drm/amd/display: Modify SMU message logs
authorSung Joon Kim <sungkim@amd.com>
Tue, 19 Sep 2023 21:04:59 +0000 (17:04 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 9 Oct 2023 20:52:55 +0000 (16:52 -0400)
[why]
It's important to make sure SMU messages
are logged by default to improve debugging for
power optimization use cases.

[how]
Change logs to warnings when SMU message
returns non-success id.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_pg_cntl.c

index b5acd7b01e40cfd92642ffbb3bbeb06e6f5df531..21dfe3faf08c3389adb3083a8405dabb8272a84e 100644 (file)
@@ -1046,6 +1046,7 @@ void dcn35_clk_mgr_construct(
                        ctx->dc->debug.disable_dpp_power_gate = false;
                        ctx->dc->debug.disable_hubp_power_gate = false;
                        ctx->dc->debug.disable_dsc_power_gate = false;
+                       ctx->dc->debug.disable_hpo_power_gate = false;
                } else {
                        /*let's reset the config control flag*/
                        ctx->dc->config.disable_ips = 1; /*pmfw not support it, disable it all*/
index cf74e69cb2a168ec9134952f0be1ad75ecd56986..b6b8c3ca1572ccf6097cc48539e868b121aae0cd 100644 (file)
@@ -130,11 +130,11 @@ static int dcn35_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr,
        result = dcn35_smu_wait_for_response(clk_mgr, 10, 2000000);
        ASSERT(result == VBIOSSMC_Result_OK);
 
+       if (result != VBIOSSMC_Result_OK) {
+               DC_LOG_WARNING("SMU response after wait: %d, msg id = %d\n", result, msg_id);
 
-
-       if (result == VBIOSSMC_Status_BUSY) {
-               smu_print("SMU response after wait: %d\n", result);
-               return -1;
+               if (result == VBIOSSMC_Status_BUSY)
+                       return -1;
        }
 
        /* First clear response register */
@@ -155,7 +155,7 @@ static int dcn35_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr,
                else
                        ASSERT(0);
                REG_WRITE(MP1_SMN_C2PMSG_91, VBIOSSMC_Result_OK);
-               smu_print("SMU response after wait: %d\n", result);
+               DC_LOG_WARNING("SMU response after wait: %d, msg id = %d\n", result, msg_id);
                return -1;
        }
 
@@ -163,7 +163,7 @@ static int dcn35_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr,
                ASSERT(0);
                result = dcn35_smu_wait_for_response(clk_mgr, 10, 2000000);
                //dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000);
-               smu_print("SMU response after wait: %d\n", result);
+               DC_LOG_WARNING("SMU response after wait: %d, msg id = %d\n", result, msg_id);
        }
 
        return REG_READ(MP1_SMN_C2PMSG_83);
index 8233cd908e1d48ff08e65753af79240d255f7d7a..6130f2c146d7a51ba4995a1f3bc2945126aa49d1 100644 (file)
@@ -832,6 +832,7 @@ struct dc_debug_options {
        bool disable_hubp_power_gate;
        bool disable_dsc_power_gate;
        bool disable_optc_power_gate;
+       bool disable_hpo_power_gate;
        int dsc_min_slice_height_override;
        int dsc_bpp_increment_div;
        bool disable_pplib_wm_range;
index ccfd3102e5a0c2d727f2df7ef24d34858b787090..e62a192c595ea9172a04d79a21704049ca5ffb08 100644 (file)
@@ -262,6 +262,7 @@ void pg_cntl35_hpo_pg_control(struct pg_cntl *pg_cntl, bool power_on)
        bool block_enabled;
 
        if (pg_cntl->ctx->dc->debug.ignore_pg ||
+               pg_cntl->ctx->dc->debug.disable_hpo_power_gate ||
                pg_cntl->ctx->dc->idle_optimizations_allowed)
                return;