} else {
                                /* IRQ_N */
                                if (p[i].flags &
-                                       (V4L2_SUBDEV_IO_PIN_DISABLE |
-                                        V4L2_SUBDEV_IO_PIN_INPUT)) {
+                                       (BIT(V4L2_SUBDEV_IO_PIN_DISABLE) |
+                                        BIT(V4L2_SUBDEV_IO_PIN_INPUT))) {
                                        pin_ctrl &= ~(0x1 << 25);
                                } else {
                                        pin_ctrl |= (0x1 << 25);
                                }
                                if (p[i].flags &
-                                       V4L2_SUBDEV_IO_PIN_ACTIVE_LOW) {
+                                       BIT(V4L2_SUBDEV_IO_PIN_ACTIVE_LOW)) {
                                        pin_ctrl &= ~(0x1 << 24);
                                } else {
                                        pin_ctrl |= (0x1 << 24);
                        } else {
                                /* GPIO19 */
                                gpio_oe &= ~(0x1 << 0);
-                               if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
+                               if (p[i].flags & BIT(V4L2_SUBDEV_IO_PIN_SET_VALUE)) {
                                        gpio_data &= ~(0x1 << 0);
                                        gpio_data |= ((p[i].value & 0x1) << 0);
                                }
                        if (p[i].function != CX23885_PAD_GPIO20) {
                                /* IR_TX */
                                gpio_oe |= (0x1 << 1);
-                               if (p[i].flags & V4L2_SUBDEV_IO_PIN_DISABLE)
+                               if (p[i].flags & BIT(V4L2_SUBDEV_IO_PIN_DISABLE))
                                        pin_ctrl &= ~(0x1 << 10);
                                else
                                        pin_ctrl |= (0x1 << 10);
                        } else {
                                /* GPIO20 */
                                gpio_oe &= ~(0x1 << 1);
-                               if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
+                               if (p[i].flags & BIT(V4L2_SUBDEV_IO_PIN_SET_VALUE)) {
                                        gpio_data &= ~(0x1 << 1);
                                        gpio_data |= ((p[i].value & 0x1) << 1);
                                }
                        } else {
                                /* GPIO21 */
                                gpio_oe &= ~(0x1 << 2);
-                               if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
+                               if (p[i].flags & BIT(V4L2_SUBDEV_IO_PIN_SET_VALUE)) {
                                        gpio_data &= ~(0x1 << 2);
                                        gpio_data |= ((p[i].value & 0x1) << 2);
                                }
                        } else {
                                /* GPIO22 */
                                gpio_oe &= ~(0x1 << 3);
-                               if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
+                               if (p[i].flags & BIT(V4L2_SUBDEV_IO_PIN_SET_VALUE)) {
                                        gpio_data &= ~(0x1 << 3);
                                        gpio_data |= ((p[i].value & 0x1) << 3);
                                }
                        } else {
                                /* GPIO23 */
                                gpio_oe &= ~(0x1 << 4);
-                               if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
+                               if (p[i].flags & BIT(V4L2_SUBDEV_IO_PIN_SET_VALUE)) {
                                        gpio_data &= ~(0x1 << 4);
                                        gpio_data |= ((p[i].value & 0x1) << 4);
                                }
 
 {
        static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
                {
-                       .flags    = V4L2_SUBDEV_IO_PIN_INPUT,
+                       .flags    = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
                        .pin      = CX23885_PIN_IR_RX_GPIO19,
                        .function = CX23885_PAD_IR_RX,
                        .value    = 0,
                        .strength = CX25840_PIN_DRIVE_MEDIUM,
                }, {
-                       .flags    = V4L2_SUBDEV_IO_PIN_OUTPUT,
+                       .flags    = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT),
                        .pin      = CX23885_PIN_IR_TX_GPIO20,
                        .function = CX23885_PAD_IR_TX,
                        .value    = 0,
 
        static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
                {
-                       .flags    = V4L2_SUBDEV_IO_PIN_INPUT,
+                       .flags    = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
                        .pin      = CX23885_PIN_IR_RX_GPIO19,
                        .function = CX23885_PAD_IR_RX,
                        .value    = 0,
 
  * not yet implemented) since ops provide proper type-checking.
  */
 
-/* Subdevice external IO pin configuration */
-#define V4L2_SUBDEV_IO_PIN_DISABLE     (1 << 0) /* ENABLE assumed */
-#define V4L2_SUBDEV_IO_PIN_OUTPUT      (1 << 1)
-#define V4L2_SUBDEV_IO_PIN_INPUT       (1 << 2)
-#define V4L2_SUBDEV_IO_PIN_SET_VALUE   (1 << 3) /* Set output value */
-#define V4L2_SUBDEV_IO_PIN_ACTIVE_LOW  (1 << 4) /* ACTIVE HIGH assumed */
+/**
+ * enum v4l2_subdev_io_pin_bits - Subdevice external IO pin configuration
+ *     bits
+ *
+ * @V4L2_SUBDEV_IO_PIN_DISABLE: disables a pin config. ENABLE assumed.
+ * @V4L2_SUBDEV_IO_PIN_OUTPUT: set it if pin is an output.
+ * @V4L2_SUBDEV_IO_PIN_INPUT: set it if pin is an input.
+ * @V4L2_SUBDEV_IO_PIN_SET_VALUE: to set the output value via
+ *                               &struct v4l2_subdev_io_pin_config->value.
+ * @V4L2_SUBDEV_IO_PIN_ACTIVE_LOW: pin active is bit 0.
+ *                                Otherwise, ACTIVE HIGH is assumed.
+ */
+enum v4l2_subdev_io_pin_bits {
+       V4L2_SUBDEV_IO_PIN_DISABLE      = 0,
+       V4L2_SUBDEV_IO_PIN_OUTPUT       = 1,
+       V4L2_SUBDEV_IO_PIN_INPUT        = 2,
+       V4L2_SUBDEV_IO_PIN_SET_VALUE    = 3,
+       V4L2_SUBDEV_IO_PIN_ACTIVE_LOW   = 4,
+};
 
 /**
  * struct v4l2_subdev_io_pin_config - Subdevice external IO pin configuration
  *
- * @flags: bitmask with flags for this pin's config:
- *        %V4L2_SUBDEV_IO_PIN_DISABLE - disables a pin config,
- *        %V4L2_SUBDEV_IO_PIN_OUTPUT - if pin is an output,
- *        %V4L2_SUBDEV_IO_PIN_INPUT - if pin is an input,
- *        %V4L2_SUBDEV_IO_PIN_SET_VALUE - to set the output value via @value
- *        and %V4L2_SUBDEV_IO_PIN_ACTIVE_LOW - if active is 0.
+ * @flags: bitmask with flags for this pin's config, whose bits are defined by
+ *        &enum v4l2_subdev_io_pin_bits.
  * @pin: Chip external IO pin to configure
  * @function: Internal signal pad/function to route to IO pin
  * @value: Initial value for pin - e.g. GPIO output value