target-sparc: implement UA2005 scratchpad registers

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>

diff --git a/target/sparc/asi.h b/target/sparc/asi.h
index c9a184960067d4c21477db2f270f9d21ff1be73d..d8d628412511a935277d9fea3df35c9ae5e067da 100644 (file)
--- a/target/sparc/asi.h
+++ b/target/sparc/asi.h
@@ -211,6 +211,7 @@
 #define ASI_AFSR               0x4c /* Async fault status register     */
 #define ASI_AFAR               0x4d /* Async fault address register    */
 #define ASI_EC_TAG_DATA                0x4e /* E-cache tag/valid ram diag acc  */
+#define ASI_HYP_SCRATCHPAD     0x4f /* (4V) Hypervisor scratchpad      */
 #define ASI_IMMU               0x50 /* Insn-MMU main register space    */
 #define ASI_IMMU_TSB_8KB_PTR   0x51 /* Insn-MMU 8KB TSB pointer reg    */
 #define ASI_IMMU_TSB_64KB_PTR  0x52 /* Insn-MMU 64KB TSB pointer reg   */

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 21fe0d1d3ed56cece90e90bcd855b915b463a7b4..9307b9135a990c6e6e63aff8b62ac26e8b80964b 100644 (file)
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -523,6 +523,7 @@ struct CPUSPARCState {
     uint32_t gl; // UA2005
     /* UA 2005 hyperprivileged registers */
     uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr;
+    uint64_t scratch[8];
     CPUTimer *hstick; // UA 2005
     /* Interrupt vector registers */
     uint64_t ivec_status;

diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 7a134b3c0da0a85f702bcbafdc22c68cf7ee1653..2e6439a6d97c4af531c2ae77d92e8ffd30a8a5ff 100644 (file)
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -1351,6 +1351,18 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
             }
             break;
         }
+    case ASI_SCRATCHPAD: /* UA2005 privileged scratchpad */
+        if (unlikely((addr >= 0x20) && (addr < 0x30))) {
+            /* Hyperprivileged access only */
+            cpu_unassigned_access(cs, addr, false, false, 1, size);
+        }
+        /* fall through */
+    case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
+        {
+            unsigned int i = (addr >> 3) & 0x7;
+            ret = env->scratch[i];
+            break;
+        }
     case ASI_DCACHE_DATA:     /* D-cache data */
     case ASI_DCACHE_TAG:      /* D-cache tag access */
     case ASI_ESTATE_ERROR_EN: /* E-cache error enable */
@@ -1603,6 +1615,18 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
     case ASI_INTR_RECEIVE: /* Interrupt data receive */
         env->ivec_status = val & 0x20;
         return;
+    case ASI_SCRATCHPAD: /* UA2005 privileged scratchpad */
+        if (unlikely((addr >= 0x20) && (addr < 0x30))) {
+            /* Hyperprivileged access only */
+            cpu_unassigned_access(cs, addr, true, false, 1, size);
+        }
+        /* fall through */
+    case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
+        {
+            unsigned int i = (addr >> 3) & 0x7;
+            env->scratch[i] = val;
+            return;
+        }
     case ASI_DCACHE_DATA: /* D-cache data */
     case ASI_DCACHE_TAG: /* D-cache tag access */
     case ASI_ESTATE_ERROR_EN: /* E-cache error enable */