xhci_write_64(xhci, temp_64, &ir->ir_set->erst_dequeue);
 }
 
+/* Clear the interrupt pending bit for a specific interrupter. */
+static void xhci_clear_interrupt_pending(struct xhci_hcd *xhci,
+                                        struct xhci_interrupter *ir)
+{
+       if (!ir->ip_autoclear) {
+               u32 irq_pending;
+
+               irq_pending = readl(&ir->ir_set->irq_pending);
+               irq_pending |= IMAN_IP;
+               writel(irq_pending, &ir->ir_set->irq_pending);
+       }
+}
+
 /*
  * xHCI spec says we can get an interrupt, and if the HC has an error condition,
  * we might get bad data out of the event ring.  Section 4.10.2.7 has a list of
 
        /* This is the handler of the primary interrupter */
        ir = xhci->interrupters[0];
-       if (!hcd->msi_enabled) {
-               u32 irq_pending;
-               irq_pending = readl(&ir->ir_set->irq_pending);
-               irq_pending |= IMAN_IP;
-               writel(irq_pending, &ir->ir_set->irq_pending);
-       }
+
+       xhci_clear_interrupt_pending(xhci, ir);
 
        if (xhci->xhc_state & XHCI_STATE_DYING ||
            xhci->xhc_state & XHCI_STATE_HALTED) {