clk: qcom: gcc-sm8250: Set delay for Venus CLK resets
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Tue, 6 Feb 2024 18:43:42 +0000 (19:43 +0100)
committerBjorn Andersson <andersson@kernel.org>
Wed, 7 Feb 2024 18:14:47 +0000 (12:14 -0600)
Some Venus resets may require more time when toggling. Describe that.

The value was obtained by referencing the msm-4.19 driver, which uses a
single value for all platforms [1].

[1] https://git.codelinaro.org/clo/la/platform/vendor/opensource/video-driver/-/blob/LA.UM.9.15.c26/msm/vidc/hfi_common.c?ref_type=heads#L3662-3663

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240105-topic-venus_reset-v2-9-c37eba13b5ce@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/gcc-sm8250.c

index c6c5261264f118f691dbb65f08b9b7a169bfdc9b..61d01d4c379b0ff1e8dea693d650b8bcd23181d9 100644 (file)
@@ -3576,8 +3576,8 @@ static const struct qcom_reset_map gcc_sm8250_resets[] = {
        [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 },
        [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
        [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
-       [GCC_VIDEO_AXI0_CLK_ARES] = { 0xb024, 2 },
-       [GCC_VIDEO_AXI1_CLK_ARES] = { 0xb028, 2 },
+       [GCC_VIDEO_AXI0_CLK_ARES] = { 0xb024, .bit = 2, .udelay = 150 },
+       [GCC_VIDEO_AXI1_CLK_ARES] = { 0xb028, .bit = 2, .udelay = 150 },
 };
 
 static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = {