drm/i915/context/: s/CTX/CXT

*sigh* the docs had it spelled wrong, corrected it, and then proceeded
to re-do the original error. The original code preserved this history,
and this patch attempts to keep in sync with the current docs.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 9ae3f2cf414ecdd6cce6b781b127d46d4510eeca..18eee8d2522de91e1105ebc1f0c88b8376483fe1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -112,8 +112,8 @@ static int get_context_size(struct drm_device *dev)
                ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
                break;
        case 7:
-               reg = I915_READ(GEN7_CTX_SIZE);
-               ret = GEN7_CTX_TOTAL_SIZE(reg) * 64;
+               reg = I915_READ(GEN7_CXT_SIZE);
+               ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
                break;
        default:
                BUG();

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1218069c7f6678cba3f116d8a672da67ed149a0f..9019194068e821f9a2a290c6e440fca8b7d9e5fc 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1482,15 +1482,15 @@
                                        GEN6_CXT_RENDER_SIZE(cxt_reg) + \
                                        GEN6_CXT_EXTENDED_SIZE(cxt_reg) + \
                                        GEN6_CXT_PIPELINE_SIZE(cxt_reg))
-#define GEN7_CTX_SIZE          0x21a8
-#define GEN7_CTX_RENDER_SIZE(ctx_reg)  ((ctx_reg >> 16) & 0x3f)
-#define GEN7_CTX_EXTENDED_SIZE(ctx_reg)        ((ctx_reg >> 9) & 0x7f)
-#define GEN7_CTX_GT1_SIZE(ctx_reg)     ((ctx_reg >> 6) & 0x7)
-#define GEN7_CTX_VFSTATE_SIZE(ctx_reg) ((ctx_reg >> 0) & 0x3f)
-#define GEN7_CTX_TOTAL_SIZE(ctx_reg)   (GEN7_CTX_RENDER_SIZE(ctx_reg) + \
-                                        GEN7_CTX_EXTENDED_SIZE(ctx_reg) + \
-                                        GEN7_CTX_GT1_SIZE(ctx_reg) + \
-                                        GEN7_CTX_VFSTATE_SIZE(ctx_reg))
+#define GEN7_CXT_SIZE          0x21a8
+#define GEN7_CXT_RENDER_SIZE(ctx_reg)  ((ctx_reg >> 16) & 0x3f)
+#define GEN7_CXT_EXTENDED_SIZE(ctx_reg)        ((ctx_reg >> 9) & 0x7f)
+#define GEN7_CXT_GT1_SIZE(ctx_reg)     ((ctx_reg >> 6) & 0x7)
+#define GEN7_CXT_VFSTATE_SIZE(ctx_reg) ((ctx_reg >> 0) & 0x3f)
+#define GEN7_CXT_TOTAL_SIZE(ctx_reg)   (GEN7_CXT_RENDER_SIZE(ctx_reg) + \
+                                        GEN7_CXT_EXTENDED_SIZE(ctx_reg) + \
+                                        GEN7_CXT_GT1_SIZE(ctx_reg) + \
+                                        GEN7_CXT_VFSTATE_SIZE(ctx_reg))
 
 /*
  * Overlay regs