drm/amd/display: Update Fixed VS/PE Retimer Sequence

[WHY/HOW]
Add a new AUX sequence provided by vendor to improve
interop with specific display configurations.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
index 68096d12f52fd600c497dc310366ce0d398672f8..7087cdc9e9775c4ad953d3db6eafba6ea12e72b0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
@@ -205,6 +205,7 @@ enum link_training_result dp_perform_fixed_vs_pe_training_sequence_legacy(
        const uint8_t vendor_lttpr_write_data_4lane_3[4] = {0x1, 0x6D, 0xF2, 0x18};
        const uint8_t vendor_lttpr_write_data_4lane_4[4] = {0x1, 0x6C, 0xF2, 0x03};
        const uint8_t vendor_lttpr_write_data_4lane_5[4] = {0x1, 0x03, 0xF3, 0x06};
+       const uint8_t vendor_lttpr_write_data_dpmf[4] = {0x1, 0x6, 0x70, 0x87};
        enum link_training_result status = LINK_TRAINING_SUCCESS;
        uint8_t lane = 0;
        union down_spread_ctrl downspread = {0};
@@ -293,6 +294,10 @@ enum link_training_result dp_perform_fixed_vs_pe_training_sequence_legacy(
                DP_DOWNSPREAD_CTRL,
                lt_settings->link_settings.link_spread);
 
+       link_configure_fixed_vs_pe_retimer(link->ddc,
+                       &vendor_lttpr_write_data_dpmf[0],
+                       sizeof(vendor_lttpr_write_data_dpmf));
+
        if (lt_settings->link_settings.lane_count == LANE_COUNT_FOUR) {
                link_configure_fixed_vs_pe_retimer(link->ddc,
                                &vendor_lttpr_write_data_4lane_1[0], sizeof(vendor_lttpr_write_data_4lane_1));
@@ -552,6 +557,7 @@ enum link_training_result dp_perform_fixed_vs_pe_training_sequence(
        const uint8_t vendor_lttpr_write_data_4lane_3[4] = {0x1, 0x6D, 0xF2, 0x18};
        const uint8_t vendor_lttpr_write_data_4lane_4[4] = {0x1, 0x6C, 0xF2, 0x03};
        const uint8_t vendor_lttpr_write_data_4lane_5[4] = {0x1, 0x03, 0xF3, 0x06};
+       const uint8_t vendor_lttpr_write_data_dpmf[4] = {0x1, 0x6, 0x70, 0x87};
        enum link_training_result status = LINK_TRAINING_SUCCESS;
        uint8_t lane = 0;
        union down_spread_ctrl downspread = {0};
@@ -639,6 +645,10 @@ enum link_training_result dp_perform_fixed_vs_pe_training_sequence(
                DP_DOWNSPREAD_CTRL,
                lt_settings->link_settings.link_spread);
 
+       link_configure_fixed_vs_pe_retimer(link->ddc,
+                       &vendor_lttpr_write_data_dpmf[0],
+                       sizeof(vendor_lttpr_write_data_dpmf));
+
        if (lt_settings->link_settings.lane_count == LANE_COUNT_FOUR) {
                link_configure_fixed_vs_pe_retimer(link->ddc,
                                &vendor_lttpr_write_data_4lane_1[0], sizeof(vendor_lttpr_write_data_4lane_1));