media: cedrus: Remove cedrus_codec enum
authorJernej Skrabec <jernej.skrabec@gmail.com>
Wed, 2 Nov 2022 18:08:06 +0000 (19:08 +0100)
committerHans Verkuil <hverkuil-cisco@xs4all.nl>
Fri, 4 Nov 2022 15:56:36 +0000 (16:56 +0100)
Last user of cedrus_codec enum is cedrus_engine_enable() but this
argument is completely redundant. Same information can be obtained via
source pixel format. Let's remove this argument and enum.

No functional changes intended.

Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
drivers/staging/media/sunxi/cedrus/cedrus.h
drivers/staging/media/sunxi/cedrus/cedrus_h264.c
drivers/staging/media/sunxi/cedrus/cedrus_h265.c
drivers/staging/media/sunxi/cedrus/cedrus_hw.c
drivers/staging/media/sunxi/cedrus/cedrus_hw.h
drivers/staging/media/sunxi/cedrus/cedrus_mpeg2.c
drivers/staging/media/sunxi/cedrus/cedrus_vp8.c

index bcb7f31bde5e58fc1174ee0336959f4c162642e8..a6a649bacc95fd9377d3f91ad6f83d2c29426ac3 100644 (file)
 #define CEDRUS_CAPABILITY_VP8_DEC      BIT(4)
 #define CEDRUS_CAPABILITY_H265_10_DEC  BIT(5)
 
-enum cedrus_codec {
-       CEDRUS_CODEC_MPEG2,
-       CEDRUS_CODEC_H264,
-       CEDRUS_CODEC_H265,
-       CEDRUS_CODEC_VP8,
-       CEDRUS_CODEC_LAST,
-};
-
 enum cedrus_irq_status {
        CEDRUS_IRQ_NONE,
        CEDRUS_IRQ_ERROR,
index a8b236cd38005608420ccfa80a122f6e2ac769b7..c139a37a567c1063fee2b6ed9b9b7bc945792d4f 100644 (file)
@@ -497,7 +497,7 @@ static int cedrus_h264_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
 {
        struct cedrus_dev *dev = ctx->dev;
 
-       cedrus_engine_enable(ctx, CEDRUS_CODEC_H264);
+       cedrus_engine_enable(ctx);
 
        cedrus_write(dev, VE_H264_SDROT_CTRL, 0);
        cedrus_write(dev, VE_H264_EXTRA_BUFFER1,
index 4952fc17f3e6d9f23f235e47a2b9ba44b9da563d..3f2946c8f174107a89622344edf2666cabdf232f 100644 (file)
@@ -463,7 +463,7 @@ static int cedrus_h265_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
        }
 
        /* Activate H265 engine. */
-       cedrus_engine_enable(ctx, CEDRUS_CODEC_H265);
+       cedrus_engine_enable(ctx);
 
        /* Source offset and length in bits. */
 
index c3387cd1e80f4a653ab59a865a8a7fce23ff2f98..fa86a658fdc6c8ec90d152e8e365cdf5ad03fa1f 100644 (file)
@@ -31,7 +31,7 @@
 #include "cedrus_hw.h"
 #include "cedrus_regs.h"
 
-int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec)
+int cedrus_engine_enable(struct cedrus_ctx *ctx)
 {
        u32 reg = 0;
 
@@ -42,18 +42,18 @@ int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec)
        reg |= VE_MODE_REC_WR_MODE_2MB;
        reg |= VE_MODE_DDR_MODE_BW_128;
 
-       switch (codec) {
-       case CEDRUS_CODEC_MPEG2:
+       switch (ctx->src_fmt.pixelformat) {
+       case V4L2_PIX_FMT_MPEG2_SLICE:
                reg |= VE_MODE_DEC_MPEG;
                break;
 
        /* H.264 and VP8 both use the same decoding mode bit. */
-       case CEDRUS_CODEC_H264:
-       case CEDRUS_CODEC_VP8:
+       case V4L2_PIX_FMT_H264_SLICE:
+       case V4L2_PIX_FMT_VP8_FRAME:
                reg |= VE_MODE_DEC_H264;
                break;
 
-       case CEDRUS_CODEC_H265:
+       case V4L2_PIX_FMT_HEVC_SLICE:
                reg |= VE_MODE_DEC_H265;
                break;
 
index 7c92f00e36da07983af4955a28432cc552a4295a..6f1e701b1ea87ce8eb177e1b9f93df66c888f07d 100644 (file)
@@ -16,7 +16,7 @@
 #ifndef _CEDRUS_HW_H_
 #define _CEDRUS_HW_H_
 
-int cedrus_engine_enable(struct cedrus_ctx *ctx, enum cedrus_codec codec);
+int cedrus_engine_enable(struct cedrus_ctx *ctx);
 void cedrus_engine_disable(struct cedrus_dev *dev);
 
 void cedrus_dst_format_set(struct cedrus_dev *dev,
index c1128d2cd5559e951a5e7713cbe164450d0a77d5..10e98f08aafcd7ea7749fcd740ae6640d8b2a3ce 100644 (file)
@@ -66,7 +66,7 @@ static int cedrus_mpeg2_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
        quantisation = run->mpeg2.quantisation;
 
        /* Activate MPEG engine. */
-       cedrus_engine_enable(ctx, CEDRUS_CODEC_MPEG2);
+       cedrus_engine_enable(ctx);
 
        /* Set intra quantisation matrix. */
        matrix = quantisation->intra_quantiser_matrix;
index f7714baae37dfd056fcfbc2947f174322ed8d531..969677a3bbf9f6ecb7c5cf7faaaf6a9413a1215e 100644 (file)
@@ -662,7 +662,7 @@ static int cedrus_vp8_setup(struct cedrus_ctx *ctx, struct cedrus_run *run)
        int header_size;
        u32 reg;
 
-       cedrus_engine_enable(ctx, CEDRUS_CODEC_VP8);
+       cedrus_engine_enable(ctx);
 
        cedrus_write(dev, VE_H264_CTRL, VE_H264_CTRL_VP8);