qemu-sparc queue
# gpg: Signature made Wed 08 Sep 2021 12:48:40 BST
# gpg: using RSA key
CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg: issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc-
20210908:
escc: fix STATUS_SYNC bit in R_STATUS register
escc: re-use escc_reset_chn() for soft reset
escc: remove register changes from escc_reset_chn()
escc: implement hard reset as described in the datasheet
escc: implement soft reset as described in the datasheet
escc: introduce escc_hard_reset_chn() for hardware reset
escc: introduce escc_soft_reset_chn() for software reset
escc: reset register values to zero in escc_reset()
escc: checkpatch fixes
sun4m: fix setting CPU id when more than one CPU is present
tcg: Drop gen_io_end()
target/sparc: Drop use of gen_io_end()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>