ARM: perf: add devicetree bindings for 11MPcore, A5, A7 and A15 PMUs

This patch adds separate devicetree bindings for 11MPcore and
Cortex-{A5,A7,A15} PMUs in preparation for improved devicetree parsing
in the ARM perf-event CPU PMU driver.

Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt
index 1c044eb320cc4fb6ed4f269ebaaa763794c485e7..343781b9f246773ce880f9427623ebbd12202f32 100644 (file)
--- a/Documentation/devicetree/bindings/arm/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/pmu.txt
@@ -7,8 +7,12 @@ representation in the device tree should be done as under:-
 Required properties:
 
 - compatible : should be one of
+       "arm,cortex-a15-pmu"
        "arm,cortex-a9-pmu"
        "arm,cortex-a8-pmu"
+       "arm,cortex-a7-pmu"
+       "arm,cortex-a5-pmu"
+       "arm,arm11mpcore-pmu"
        "arm,arm1176-pmu"
        "arm,arm1136-pmu"
 - interrupts : 1 combined interrupt or 1 per core.

diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index c44647ef7357baf63bb96347889340c5ab76de02..3aa3388491334a7834c198c91276a3d4a62a4493 100644 (file)
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -646,10 +646,14 @@ arch_initcall(cpu_pmu_reset);
  * PMU platform driver and devicetree bindings.
  */
 static struct of_device_id armpmu_of_device_ids[] = {
+       {.compatible = "arm,cortex-a15-pmu"},
        {.compatible = "arm,cortex-a9-pmu"},
        {.compatible = "arm,cortex-a8-pmu"},
-       {.compatible = "arm,arm1136-pmu"},
+       {.compatible = "arm,cortex-a7-pmu"},
+       {.compatible = "arm,cortex-a5-pmu"},
+       {.compatible = "arm,arm11mpcore-pmu"},
        {.compatible = "arm,arm1176-pmu"},
+       {.compatible = "arm,arm1136-pmu"},
        {},
 };