MIPS: move unselectable entries out of the "CPU type" choice

Move the following entries out of the "CPU type" choice:

 - LOONGSON3_ENHANCEMENT
 - CPU_LOONGSON3_WORKAROUNDS
 - CPU_LOONGSON3_CPUCFG_EMULATION

These entries cannot be selected from the choice because they depend on
CPU_LOONGSON64, which is also located in the same choice.

In fact, Kconfig does not consider them as choice values because they
become children of CPU_LOOONGSON64 due to the automatic submenu creation
in menu_finalize().

However, it is hard to understand this behavior unless you are familiar
with the Kconfig internals.

"choice" should contain only selectable entries.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index aa9b0ac649f646a3edd320097c98c52193064a7a..492d7b900929db8c1b37621ec908d3f1328ace91 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1328,44 +1328,6 @@ config CPU_LOONGSON64
          3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
          Loongson-2E/2F is not covered here and will be removed in future.
 
-config LOONGSON3_ENHANCEMENT
-       bool "New Loongson-3 CPU Enhancements"
-       default n
-       depends on CPU_LOONGSON64
-       help
-         New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
-         R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
-         FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
-         Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
-         Fast TLB refill support, etc.
-
-         This option enable those enhancements which are not probed at run
-         time. If you want a generic kernel to run on all Loongson 3 machines,
-         please say 'N' here. If you want a high-performance kernel to run on
-         new Loongson-3 machines only, please say 'Y' here.
-
-config CPU_LOONGSON3_WORKAROUNDS
-       bool "Loongson-3 LLSC Workarounds"
-       default y if SMP
-       depends on CPU_LOONGSON64
-       help
-         Loongson-3 processors have the llsc issues which require workarounds.
-         Without workarounds the system may hang unexpectedly.
-
-         Say Y, unless you know what you are doing.
-
-config CPU_LOONGSON3_CPUCFG_EMULATION
-       bool "Emulate the CPUCFG instruction on older Loongson cores"
-       default y
-       depends on CPU_LOONGSON64
-       help
-         Loongson-3A R4 and newer have the CPUCFG instruction available for
-         userland to query CPU capabilities, much like CPUID on x86. This
-         option provides emulation of the instruction on older Loongson
-         cores, back to Loongson-3A1000.
-
-         If unsure, please say Y.
-
 config CPU_LOONGSON2E
        bool "Loongson 2E"
        depends on SYS_HAS_CPU_LOONGSON2E
@@ -1703,6 +1665,44 @@ config CPU_BMIPS
 
 endchoice
 
+config LOONGSON3_ENHANCEMENT
+       bool "New Loongson-3 CPU Enhancements"
+       default n
+       depends on CPU_LOONGSON64
+       help
+         New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
+         R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
+         FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
+         Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
+         Fast TLB refill support, etc.
+
+         This option enable those enhancements which are not probed at run
+         time. If you want a generic kernel to run on all Loongson 3 machines,
+         please say 'N' here. If you want a high-performance kernel to run on
+         new Loongson-3 machines only, please say 'Y' here.
+
+config CPU_LOONGSON3_WORKAROUNDS
+       bool "Loongson-3 LLSC Workarounds"
+       default y if SMP
+       depends on CPU_LOONGSON64
+       help
+         Loongson-3 processors have the llsc issues which require workarounds.
+         Without workarounds the system may hang unexpectedly.
+
+         Say Y, unless you know what you are doing.
+
+config CPU_LOONGSON3_CPUCFG_EMULATION
+       bool "Emulate the CPUCFG instruction on older Loongson cores"
+       default y
+       depends on CPU_LOONGSON64
+       help
+         Loongson-3A R4 and newer have the CPUCFG instruction available for
+         userland to query CPU capabilities, much like CPUID on x86. This
+         option provides emulation of the instruction on older Loongson
+         cores, back to Loongson-3A1000.
+
+         If unsure, please say Y.
+
 config CPU_MIPS32_3_5_FEATURES
        bool "MIPS32 Release 3.5 Features"
        depends on SYS_HAS_CPU_MIPS32_R3_5