serial@3e000000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
- status = "disabled";
reg = <0x3e000000 0x1000>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
serial@3e001000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
- status = "disabled";
reg = <0x3e001000 0x1000>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
serial@3e002000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
- status = "disabled";
reg = <0x3e002000 0x1000>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
serial@3e003000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
- status = "disabled";
reg = <0x3e003000 0x1000>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
L2: l2-cache@3ff20000 {
serial@3e000000 {
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
- status = "disabled";
reg = <0x3e000000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
serial@3e001000 {
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
- status = "disabled";
reg = <0x3e001000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
serial@3e002000 {
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
- status = "disabled";
reg = <0x3e002000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
L2: cache-controller@3ff20000 {
uartb: serial@0 {
compatible = "snps,dw-apb-uart";
- status = "disabled";
reg = <0x00000000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
uartb2: serial@1000 {
compatible = "snps,dw-apb-uart";
- status = "disabled";
reg = <0x00001000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
uartb3: serial@2000 {
compatible = "snps,dw-apb-uart";
- status = "disabled";
reg = <0x00002000 0x118>;
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
bsc1: i2c@16000 {
};
i2c@3e016000 {
- status = "okay";
clock-frequency = <400000>;
+ status = "okay";
};
i2c@3e017000 {
- status = "okay";
clock-frequency = <400000>;
+ status = "okay";
};
i2c@3e018000 {
- status = "okay";
clock-frequency = <400000>;
+ status = "okay";
};
i2c@3500d000 {
- status = "okay";
clock-frequency = <100000>;
+ status = "okay";
pmu: pmu@8 {
reg = <0x08>;