#endif /* CONFIG_TCG */
/* PER bits from control register 9 */
-#define PER_CR9_EVENT_BRANCH 0x80000000
-#define PER_CR9_EVENT_IFETCH 0x40000000
-#define PER_CR9_EVENT_STORE 0x20000000
-#define PER_CR9_EVENT_STORE_REAL 0x08000000
-#define PER_CR9_EVENT_NULLIFICATION 0x01000000
-#define PER_CR9_CONTROL_BRANCH_ADDRESS 0x00800000
-#define PER_CR9_CONTROL_ALTERATION 0x00200000
+#define PER_CR9_EVENT_BRANCH 0x80000000
+#define PER_CR9_EVENT_IFETCH 0x40000000
+#define PER_CR9_EVENT_STORE 0x20000000
+#define PER_CR9_EVENT_STORAGE_KEY_ALTERATION 0x10000000
+#define PER_CR9_EVENT_STORE_REAL 0x08000000
+#define PER_CR9_EVENT_ZERO_ADDRESS_DETECTION 0x04000000
+#define PER_CR9_EVENT_TRANSACTION_END 0x02000000
+#define PER_CR9_EVENT_IFETCH_NULLIFICATION 0x01000000
+#define PER_CR9_CONTROL_BRANCH_ADDRESS 0x00800000
+#define PER_CR9_CONTROL_TRANSACTION_SUPRESS 0x00400000
+#define PER_CR9_CONTROL_STORAGE_ALTERATION 0x00200000
/* PER bits from the PER CODE/ATMID/AI in lowcore */
#define PER_CODE_EVENT_BRANCH 0x8000
/* If the instruction has to be nullified, trigger the
exception immediately. */
- if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
+ if (env->cregs[9] & PER_CR9_EVENT_IFETCH_NULLIFICATION) {
CPUState *cs = env_cpu(env);
env->per_perc_atmid |= PER_CODE_EVENT_NULLIFICATION;