dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
authorSam Protsenko <semen.protsenko@linaro.org>
Fri, 17 Dec 2021 16:15:47 +0000 (18:15 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Mon, 20 Dec 2021 09:35:32 +0000 (10:35 +0100)
All Exynos850 GPIO blocks can use EXYNOS5420_PIN_DRV* definitions,
except GPIO_HSI block. Add pin drive strength definitions for GPIO_HSI
block correspondingly.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217161549.24836-6-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
include/dt-bindings/pinctrl/samsung.h

index b1832506b92391471c89a4c5d0aadff4f6451377..950970634dfe4be2d513c6a0e961d2197963bfe0 100644 (file)
 #define EXYNOS5260_PIN_DRV_LV4         2
 #define EXYNOS5260_PIN_DRV_LV6         3
 
-/* Drive strengths for Exynos5410, Exynos542x and Exynos5800 */
+/*
+ * Drive strengths for Exynos5410, Exynos542x, Exynos5800 and Exynos850 (except
+ * GPIO_HSI block)
+ */
 #define EXYNOS5420_PIN_DRV_LV1         0
 #define EXYNOS5420_PIN_DRV_LV2         1
 #define EXYNOS5420_PIN_DRV_LV3         2
 #define EXYNOS5433_PIN_DRV_SLOW_SR5    0xc
 #define EXYNOS5433_PIN_DRV_SLOW_SR6    0xf
 
+/* Drive strengths for Exynos850 GPIO_HSI block */
+#define EXYNOS850_HSI_PIN_DRV_LV1      0       /* 1x   */
+#define EXYNOS850_HSI_PIN_DRV_LV1_5    1       /* 1.5x */
+#define EXYNOS850_HSI_PIN_DRV_LV2      2       /* 2x   */
+#define EXYNOS850_HSI_PIN_DRV_LV2_5    3       /* 2.5x */
+#define EXYNOS850_HSI_PIN_DRV_LV3      4       /* 3x   */
+#define EXYNOS850_HSI_PIN_DRV_LV4      5       /* 4x   */
+
 #define EXYNOS_PIN_FUNC_INPUT          0
 #define EXYNOS_PIN_FUNC_OUTPUT         1
 #define EXYNOS_PIN_FUNC_2              2