arm64: dts: renesas: r8a779f0: Add UFS node

Add UFS node for R-Car S4-8 (r8a779f0).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220603110524.1997825-7-yoshihiro.shimoda.uh@renesas.com
[geert: Move ufs30-clk to preserve sort order]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index 1a60a8e4b1bc75249088f02aee40261e2c3b7179..54474ba18f5fdcd42b00e48cdccd1d9dafc1db6e 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -271,6 +271,18 @@
                        status = "disabled";
                };
 
+               ufs: ufs@e6860000 {
+                       compatible = "renesas,r8a779f0-ufs";
+                       reg = <0 0xe6860000 0 0x100>;
+                       interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>;
+                       clock-names = "fck", "ref_clk";
+                       freq-table-hz = <200000000 200000000>, <38400000 38400000>;
+                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+                       resets = <&cpg 1514>;
+                       status = "disabled";
+               };
+
                scif3: serial@e6c50000 {
                        compatible = "renesas,scif-r8a779f0",
                                     "renesas,rcar-gen4-scif", "renesas,scif";
@@ -485,4 +497,11 @@
                                      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
                                      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
        };
+
+       ufs30_clk: ufs30-clk {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               /* This value must be overridden by the board */
+               clock-frequency = <0>;
+       };
 };