if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state))
                return true;
 
-       /* If the VFs have been disabled, this means something else is
-        * resetting the VF, so we shouldn't continue.
-        */
-       if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
+       /* Bail out if VFs are disabled. */
+       if (test_bit(__I40E_VF_DISABLE, pf->state))
+               return true;
+
+       /* If VF is being reset already we don't need to continue. */
+       if (test_and_set_bit(I40E_VF_STATE_RESETTING, &vf->vf_states))
                return true;
 
        i40e_trigger_vf_reset(vf, flr);
        i40e_cleanup_reset_vf(vf);
 
        i40e_flush(hw);
-       clear_bit(__I40E_VF_DISABLE, pf->state);
+       clear_bit(I40E_VF_STATE_RESETTING, &vf->vf_states);
 
        return true;
 }
                return false;
 
        /* Begin reset on all VFs at once */
-       for (v = 0; v < pf->num_alloc_vfs; v++)
-               i40e_trigger_vf_reset(&pf->vf[v], flr);
+       for (v = 0; v < pf->num_alloc_vfs; v++) {
+               vf = &pf->vf[v];
+               /* If VF is being reset no need to trigger reset again */
+               if (!test_bit(I40E_VF_STATE_RESETTING, &vf->vf_states))
+                       i40e_trigger_vf_reset(&pf->vf[v], flr);
+       }
 
        /* HW requires some time to make sure it can flush the FIFO for a VF
         * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
                 */
                while (v < pf->num_alloc_vfs) {
                        vf = &pf->vf[v];
-                       reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
-                       if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
-                               break;
+                       if (!test_bit(I40E_VF_STATE_RESETTING, &vf->vf_states)) {
+                               reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
+                               if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
+                                       break;
+                       }
 
                        /* If the current VF has finished resetting, move on
                         * to the next VF in sequence.
                if (pf->vf[v].lan_vsi_idx == 0)
                        continue;
 
+               /* If VF is reset in another thread just continue */
+               if (test_bit(I40E_VF_STATE_RESETTING, &vf->vf_states))
+                       continue;
+
                i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
        }
 
                if (pf->vf[v].lan_vsi_idx == 0)
                        continue;
 
+               /* If VF is reset in another thread just continue */
+               if (test_bit(I40E_VF_STATE_RESETTING, &vf->vf_states))
+                       continue;
+
                i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
        }
 
        mdelay(50);
 
        /* Finish the reset on each VF */
-       for (v = 0; v < pf->num_alloc_vfs; v++)
+       for (v = 0; v < pf->num_alloc_vfs; v++) {
+               /* If VF is reset in another thread just continue */
+               if (test_bit(I40E_VF_STATE_RESETTING, &vf->vf_states))
+                       continue;
+
                i40e_cleanup_reset_vf(&pf->vf[v]);
+       }
 
        i40e_flush(hw);
        clear_bit(__I40E_VF_DISABLE, pf->state);