Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha.  This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place.

Signed-off-by: Richard Henderson <rth@twiddle.net>

diff --git a/exec.c b/exec.c
index 891e0eee03b44fa737c2c007546784c0df441e82..431f5b2976d0e67544715e2e54a00813eef3a30a 100644 (file)
--- a/exec.c
+++ b/exec.c
@@ -62,23 +62,6 @@
 
 #define SMC_BITMAP_USE_THRESHOLD 10
 
-#if defined(TARGET_SPARC64)
-#define TARGET_PHYS_ADDR_SPACE_BITS 41
-#elif defined(TARGET_SPARC)
-#define TARGET_PHYS_ADDR_SPACE_BITS 36
-#elif defined(TARGET_ALPHA)
-#define TARGET_PHYS_ADDR_SPACE_BITS 42
-#define TARGET_VIRT_ADDR_SPACE_BITS 42
-#elif defined(TARGET_PPC64)
-#define TARGET_PHYS_ADDR_SPACE_BITS 42
-#elif defined(TARGET_X86_64)
-#define TARGET_PHYS_ADDR_SPACE_BITS 42
-#elif defined(TARGET_I386)
-#define TARGET_PHYS_ADDR_SPACE_BITS 36
-#else
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
-#endif
-
 static TranslationBlock *tbs;
 int code_gen_max_blocks;
 TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];

diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 617f55c20c1f519a6c74896098ec6a2ea1bd686a..8afe16db274643259b8c5e2fec7bbce6602c3b0a 100644 (file)
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -41,7 +41,9 @@
 
 #define TARGET_PAGE_BITS 13
 
-#define VA_BITS 43
+/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44.  */
+#define TARGET_PHYS_ADDR_SPACE_BITS    44
+#define TARGET_VIRT_ADDR_SPACE_BITS    (30 + TARGET_PAGE_BITS)
 
 /* Alpha major type */
 enum {

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 4a1c53f24f97fb4a5c9aa0b91c4d3c3b6280840e..3892db44e0d05fac82a1a93cc99c9d24edc10d66 100644 (file)
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -405,6 +405,9 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
 #define TARGET_PAGE_BITS 10
 #endif
 
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
 #define cpu_init cpu_arm_init
 #define cpu_exec cpu_arm_exec
 #define cpu_gen_code cpu_arm_gen_code

diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 8ff86d95e5430264f66722daa1a6a07a67659063..063a2402ba8c2e13894499e425ce1b551a7b7fde 100644 (file)
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -200,6 +200,9 @@ enum {
 #define TARGET_PAGE_BITS 13
 #define MMAP_SHIFT TARGET_PAGE_BITS
 
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
 #define cpu_init cpu_cris_init
 #define cpu_exec cpu_cris_exec
 #define cpu_gen_code cpu_cris_gen_code

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index ef7d951fcc17f868e17fa8bc45234125cae9fdab..198ea7d2fdb34818821283c9f8612d5030ef304d 100644 (file)
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -874,6 +874,17 @@ uint64_t cpu_get_tsc(CPUX86State *env);
 
 #define TARGET_PAGE_BITS 12
 
+#ifdef TARGET_X86_64
+#define TARGET_PHYS_ADDR_SPACE_BITS 52
+/* ??? This is really 48 bits, sign-extended, but the only thing
+   accessible to userland with bit 48 set is the VSYSCALL, and that
+   is handled via other mechanisms.  */
+#define TARGET_VIRT_ADDR_SPACE_BITS 47
+#else
+#define TARGET_PHYS_ADDR_SPACE_BITS 36
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+#endif
+
 #define cpu_init cpu_x86_init
 #define cpu_exec cpu_x86_exec
 #define cpu_gen_code cpu_x86_gen_code

diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 68a7e41bc950437270a0af8260b11b825ce190c8..b2f37ec33dee76554058fbddcded4b56a0d7bf94 100644 (file)
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -210,6 +210,9 @@ void register_m68k_insns (CPUM68KState *env);
 #define TARGET_PAGE_BITS 10
 #endif
 
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
 #define cpu_init cpu_m68k_init
 #define cpu_exec cpu_m68k_exec
 #define cpu_gen_code cpu_m68k_gen_code

diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 1bf4875ecfe653442df4b5c5db5b8dcc6639fa9a..599938639a8c254a886511303e2541598e103604 100644 (file)
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -253,6 +253,9 @@ enum {
 #define TARGET_PAGE_BITS 12
 #define MMAP_SHIFT TARGET_PAGE_BITS
 
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
 #define cpu_init cpu_mb_init
 #define cpu_exec cpu_mb_exec
 #define cpu_gen_code cpu_mb_gen_code

diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index 54e80f10e49ea9272658c7c43c96c650a555eafa..0f6a9562ab008726508280e0d0486d24a1d83a89 100644 (file)
--- a/target-mips/mips-defs.h
+++ b/target-mips/mips-defs.h
@@ -8,6 +8,10 @@
 #define TARGET_PAGE_BITS 12
 #define MIPS_TLB_MAX 128
 
+/* ??? MIPS64 no doubt has a larger address space.  */
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
 #if defined(TARGET_MIPS64)
 #define TARGET_LONG_BITS 64
 #else

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 63aeb86070d5c5a5b28b36f933724751c0d03a79..cecc6e2cd56f0f6cf60ff44168364cae38e1e7a0 100644 (file)
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -29,6 +29,20 @@
 #define TARGET_LONG_BITS 64
 #define TARGET_PAGE_BITS 12
 
+/* Note that the official physical address space bits is 62-M where M
+   is implementation dependent.  I've not looked up M for the set of
+   cpus we emulate at the system level.  */
+#define TARGET_PHYS_ADDR_SPACE_BITS 62
+
+/* Note that the PPC environment architecture talks about 80 bit virtual
+   addresses, with segmentation.  Obviously that's not all visible to a
+   single process, which is all we're concerned with here.  */
+#ifdef TARGET_ABI32
+# define TARGET_VIRT_ADDR_SPACE_BITS 32
+#else
+# define TARGET_VIRT_ADDR_SPACE_BITS 64
+#endif
+
 #else /* defined (TARGET_PPC64) */
 /* PowerPC 32 definitions */
 #define TARGET_LONG_BITS 32
@@ -50,6 +64,9 @@
 #define TARGET_PAGE_BITS 12
 #endif /* defined(TARGET_PPCEMB) */
 
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
 #endif /* defined (TARGET_PPC64) */
 
 #define CPUState struct CPUPPCState

diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 827f4e33dc4289b80388179a821cf53581c7c047..dd407b2424ff2aad025900b53808c31a36b462d0 100644 (file)
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -99,6 +99,11 @@ int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong address, int rw
 
 #define TARGET_PAGE_BITS 12
 
+/* ??? This is certainly wrong for 64-bit s390x, but given that only KVM
+   emulation actually works, this is good enough for a placeholder.  */
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
 #ifndef CONFIG_USER_ONLY
 extern int s390_virtio_hypercall(CPUState *env);
 extern void kvm_s390_virtio_irq(CPUState *env, int config_change, uint64_t token);

diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 85f221d978f3aeb39d95a123d86146728a68d43e..18a55320f4c68d300e71fbe1c748977e8868157b 100644 (file)
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -44,6 +44,9 @@
 
 #define TARGET_PAGE_BITS 12    /* 4k XXXXX */
 
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
 #define SR_MD (1 << 30)
 #define SR_RB (1 << 29)
 #define SR_BL (1 << 28)

diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 5980deb6a3e452373391a12b62570cd9e7b65b35..0c5a7ef54d1eb350d1224c9093d79c4a194d515c 100644 (file)
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -7,10 +7,18 @@
 #define TARGET_LONG_BITS 32
 #define TARGET_FPREGS 32
 #define TARGET_PAGE_BITS 12 /* 4k */
+#define TARGET_PHYS_ADDR_SPACE_BITS 41
+# ifdef TARGET_ABI32
+#  define TARGET_VIRT_ADDR_SPACE_BITS 32
+# else
+#  define TARGET_VIRT_ADDR_SPACE_BITS 44
+# endif
 #else
 #define TARGET_LONG_BITS 64
 #define TARGET_FPREGS 64
 #define TARGET_PAGE_BITS 13 /* 8k */
+#define TARGET_PHYS_ADDR_SPACE_BITS 36
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
 #endif
 
 #define CPUState struct CPUSPARCState