/* ISA feature bits (similar to MISA) */
DECLARE_BITMAP(isa, RISCV_ISA_EXT_MAX);
+ /* Vendor, Arch, and Implementation details */
+ unsigned long mvendorid;
+ unsigned long marchid;
+ unsigned long mimpid;
+
/* SSCRATCH, STVEC, and SCOUNTEREN of Host */
unsigned long host_sscratch;
unsigned long host_stvec;
#include <asm/csr.h>
#include <asm/cacheflush.h>
#include <asm/hwcap.h>
+#include <asm/sbi.h>
const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
KVM_GENERIC_VCPU_STATS(),
set_bit(host_isa, vcpu->arch.isa);
}
+ /* Setup vendor, arch, and implementation details */
+ vcpu->arch.mvendorid = sbi_get_mvendorid();
+ vcpu->arch.marchid = sbi_get_marchid();
+ vcpu->arch.mimpid = sbi_get_mimpid();
+
/* Setup VCPU hfence queue */
spin_lock_init(&vcpu->arch.hfence_lock);
{
int ret = 0;
struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
- struct sbiret ecall_ret;
switch (cp->a6) {
case SBI_EXT_BASE_GET_SPEC_VERSION:
*out_val = kvm_vcpu_sbi_find_ext(cp->a0) ? 1 : 0;
break;
case SBI_EXT_BASE_GET_MVENDORID:
+ *out_val = vcpu->arch.mvendorid;
+ break;
case SBI_EXT_BASE_GET_MARCHID:
+ *out_val = vcpu->arch.marchid;
+ break;
case SBI_EXT_BASE_GET_MIMPID:
- ecall_ret = sbi_ecall(SBI_EXT_BASE, cp->a6, 0, 0, 0, 0, 0, 0);
- if (!ecall_ret.error)
- *out_val = ecall_ret.value;
- /*TODO: We are unnecessarily converting the error twice */
- ret = sbi_err_map_linux_errno(ecall_ret.error);
+ *out_val = vcpu->arch.mimpid;
break;
default:
ret = -EOPNOTSUPP;