struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY];
 };
 
-#define QCOM_PCIE_2_3_2_MAX_SUPPLY     2
+#define QCOM_PCIE_2_3_2_MAX_CLOCKS             4
+#define QCOM_PCIE_2_3_2_MAX_SUPPLY             2
 struct qcom_pcie_resources_2_3_2 {
-       struct clk *aux_clk;
-       struct clk *master_clk;
-       struct clk *slave_clk;
-       struct clk *cfg_clk;
+       struct clk_bulk_data clks[QCOM_PCIE_2_3_2_MAX_CLOCKS];
        struct regulator_bulk_data supplies[QCOM_PCIE_2_3_2_MAX_SUPPLY];
 };
 
        if (ret)
                return ret;
 
-       res->aux_clk = devm_clk_get(dev, "aux");
-       if (IS_ERR(res->aux_clk))
-               return PTR_ERR(res->aux_clk);
-
-       res->cfg_clk = devm_clk_get(dev, "cfg");
-       if (IS_ERR(res->cfg_clk))
-               return PTR_ERR(res->cfg_clk);
-
-       res->master_clk = devm_clk_get(dev, "bus_master");
-       if (IS_ERR(res->master_clk))
-               return PTR_ERR(res->master_clk);
+       res->clks[0].id = "aux";
+       res->clks[1].id = "cfg";
+       res->clks[2].id = "bus_master";
+       res->clks[3].id = "bus_slave";
 
-       res->slave_clk = devm_clk_get(dev, "bus_slave");
-       if (IS_ERR(res->slave_clk))
-               return PTR_ERR(res->slave_clk);
+       ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
+       if (ret < 0)
+               return ret;
 
        return 0;
 }
 {
        struct qcom_pcie_resources_2_3_2 *res = &pcie->res.v2_3_2;
 
-       clk_disable_unprepare(res->slave_clk);
-       clk_disable_unprepare(res->master_clk);
-       clk_disable_unprepare(res->cfg_clk);
-       clk_disable_unprepare(res->aux_clk);
-
+       clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks);
        regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
 }
 
                return ret;
        }
 
-       ret = clk_prepare_enable(res->aux_clk);
-       if (ret) {
-               dev_err(dev, "cannot prepare/enable aux clock\n");
-               goto err_aux_clk;
-       }
-
-       ret = clk_prepare_enable(res->cfg_clk);
-       if (ret) {
-               dev_err(dev, "cannot prepare/enable cfg clock\n");
-               goto err_cfg_clk;
-       }
-
-       ret = clk_prepare_enable(res->master_clk);
-       if (ret) {
-               dev_err(dev, "cannot prepare/enable master clock\n");
-               goto err_master_clk;
-       }
-
-       ret = clk_prepare_enable(res->slave_clk);
+       ret = clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks);
        if (ret) {
-               dev_err(dev, "cannot prepare/enable slave clock\n");
-               goto err_slave_clk;
+               dev_err(dev, "cannot prepare/enable clocks\n");
+               regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
+               return ret;
        }
 
        return 0;
-
-err_slave_clk:
-       clk_disable_unprepare(res->master_clk);
-err_master_clk:
-       clk_disable_unprepare(res->cfg_clk);
-err_cfg_clk:
-       clk_disable_unprepare(res->aux_clk);
-
-err_aux_clk:
-       regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
-
-       return ret;
 }
 
 static int qcom_pcie_post_init_2_3_2(struct qcom_pcie *pcie)