KVM: x86/pmu: Rename global_ovf_ctrl_mask to global_status_mask
authorSean Christopherson <seanjc@google.com>
Sat, 3 Jun 2023 01:10:47 +0000 (18:10 -0700)
committerSean Christopherson <seanjc@google.com>
Wed, 7 Jun 2023 00:31:44 +0000 (17:31 -0700)
Rename global_ovf_ctrl_mask to global_status_mask to avoid confusion now
that Intel has renamed GLOBAL_OVF_CTRL to GLOBAL_STATUS_RESET in PMU v4.
GLOBAL_OVF_CTRL and GLOBAL_STATUS_RESET are the same MSR index, i.e. are
just different names for the same thing, but the SDM provides different
entries in the IA-32 Architectural MSRs table, which gets really confusing
when looking at PMU v4 definitions since it *looks* like GLOBAL_STATUS has
bits that don't exist in GLOBAL_OVF_CTRL, but in reality the bits are
simply defined in the GLOBAL_STATUS_RESET entry.

No functional change intended.

Cc: Like Xu <like.xu.linux@gmail.com>
Link: https://lore.kernel.org/r/20230603011058.1038821-2-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
arch/x86/include/asm/kvm_host.h
arch/x86/kvm/vmx/pmu_intel.c

index fb9d1f2d6136c9952844840dc18c7f77af7a9b17..28bd38303d70461ad51b79d85b9f7b79b5984605 100644 (file)
@@ -523,7 +523,7 @@ struct kvm_pmu {
        u64 global_status;
        u64 counter_bitmask[2];
        u64 global_ctrl_mask;
-       u64 global_ovf_ctrl_mask;
+       u64 global_status_mask;
        u64 reserved_bits;
        u64 raw_event_mask;
        struct kvm_pmc gp_counters[KVM_INTEL_PMC_MAX_GENERIC];
index 741efe2c497bafe05559eb681b7d3756d483adf6..fb96cbfc9ae808d3f12a7508be5ed13b566ca630 100644 (file)
@@ -427,7 +427,11 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
                }
                break;
        case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
-               if (data & pmu->global_ovf_ctrl_mask)
+               /*
+                * GLOBAL_OVF_CTRL, a.k.a. GLOBAL STATUS_RESET, clears bits in
+                * GLOBAL_STATUS, and so the set of reserved bits is the same.
+                */
+               if (data & pmu->global_status_mask)
                        return 1;
 
                if (!msr_info->host_initiated)
@@ -531,7 +535,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
        pmu->reserved_bits = 0xffffffff00200000ull;
        pmu->raw_event_mask = X86_RAW_EVENT_MASK;
        pmu->global_ctrl_mask = ~0ull;
-       pmu->global_ovf_ctrl_mask = ~0ull;
+       pmu->global_status_mask = ~0ull;
        pmu->fixed_ctr_ctrl_mask = ~0ull;
        pmu->pebs_enable_mask = ~0ull;
        pmu->pebs_data_cfg_mask = ~0ull;
@@ -585,11 +589,17 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
        counter_mask = ~(((1ull << pmu->nr_arch_gp_counters) - 1) |
                (((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED));
        pmu->global_ctrl_mask = counter_mask;
-       pmu->global_ovf_ctrl_mask = pmu->global_ctrl_mask
+
+       /*
+        * GLOBAL_STATUS and GLOBAL_OVF_CONTROL (a.k.a. GLOBAL_STATUS_RESET)
+        * share reserved bit definitions.  The kernel just happens to use
+        * OVF_CTRL for the names.
+        */
+       pmu->global_status_mask = pmu->global_ctrl_mask
                        & ~(MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF |
                            MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD);
        if (vmx_pt_mode_is_host_guest())
-               pmu->global_ovf_ctrl_mask &=
+               pmu->global_status_mask &=
                                ~MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI;
 
        entry = kvm_find_cpuid_entry_index(vcpu, 7, 0);