usb: dwc2: New bit definition in GPWRDN register
authorMinas Harutyunyan <Minas.Harutyunyan@synopsys.com>
Wed, 13 Mar 2024 09:19:52 +0000 (09:19 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 26 Mar 2024 09:44:53 +0000 (10:44 +0100)
Added new bit ULPI_LATCH_EN_DURING_HIB_ENTRY in GPWRDN register.
This bit applicable HSOTG cores v5.00 or higher.
Affects Hibernation Entry and Exit sequence (for both Host and Device)
when using ULPI PHY.

Signed-off-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
Link: https://lore.kernel.org/r/56d05a4f5750aaa58d8c5bab7705814942a985bd.1708948356.git.Minas.Harutyunyan@synopsys.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc2/hw.h

index c1d5d46c33e3a4863c135fb4d051f355c37b7882..5e449393b0d723beed6c795054a4ff3bf8c8e71a 100644 (file)
 #define GLPMCFG_LPMCAP                 BIT(0)
 
 #define GPWRDN                         HSOTG_REG(0x0058)
+
+#define GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY  BIT(29)
 #define GPWRDN_MULT_VAL_ID_BC_MASK     (0x1f << 24)
 #define GPWRDN_MULT_VAL_ID_BC_SHIFT    24
 #define GPWRDN_ADP_INT                 BIT(23)