arm64: dts: exynos: add initial CMU clock nodes in ExynosAutov9

Add cmu_top, cmu_busmc, cmu_core, cmu_fsys and peric0/c1/s clock nodes.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20220504075154.58819-11-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index 68d087ed045906ab710c99a8fdcde39a394270f0..499b9ce3bee1a11e1019a5df7c9267f05b067bca 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -6,6 +6,7 @@
  *
  */
 
+#include <dt-bindings/clock/samsung,exynosautov9.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/soc/samsung,exynos-usi.h>
 
@@ -189,6 +190,89 @@
                        reg = <0x10000000 0x24>;
                };
 
+               cmu_peris: clock-controller@10020000 {
+                       compatible = "samsung,exynosautov9-cmu-peris";
+                       reg = <0x10020000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>,
+                                <&cmu_top DOUT_CLKCMU_PERIS_BUS>;
+                       clock-names = "oscclk",
+                                     "dout_clkcmu_peris_bus";
+               };
+
+               cmu_peric0: clock-controller@10200000 {
+                       compatible = "samsung,exynosautov9-cmu-peric0";
+                       reg = <0x10200000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>,
+                                <&cmu_top DOUT_CLKCMU_PERIC0_BUS>,
+                                <&cmu_top DOUT_CLKCMU_PERIC0_IP>;
+                       clock-names = "oscclk",
+                                     "dout_clkcmu_peric0_bus",
+                                     "dout_clkcmu_peric0_ip";
+               };
+
+               cmu_peric1: clock-controller@10800000 {
+                       compatible = "samsung,exynosautov9-cmu-peric1";
+                       reg = <0x10800000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>,
+                                <&cmu_top DOUT_CLKCMU_PERIC1_BUS>,
+                                <&cmu_top DOUT_CLKCMU_PERIC1_IP>;
+                       clock-names = "oscclk",
+                                     "dout_clkcmu_peric1_bus",
+                                     "dout_clkcmu_peric1_ip";
+               };
+
+               cmu_fsys2: clock-controller@17c00000 {
+                       compatible = "samsung,exynosautov9-cmu-fsys2";
+                       reg = <0x17c00000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>,
+                                <&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
+                                <&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
+                                <&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;
+                       clock-names = "oscclk",
+                                     "dout_clkcmu_fsys2_bus",
+                                     "dout_fsys2_clkcmu_ufs_embd",
+                                     "dout_fsys2_clkcmu_ethernet";
+               };
+
+               cmu_core: clock-controller@1b030000 {
+                       compatible = "samsung,exynosautov9-cmu-core";
+                       reg = <0x1b030000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>,
+                                <&cmu_top DOUT_CLKCMU_CORE_BUS>;
+                       clock-names = "oscclk",
+                                     "dout_clkcmu_core_bus";
+               };
+
+               cmu_busmc: clock-controller@1b200000 {
+                       compatible = "samsung,exynosautov9-cmu-busmc";
+                       reg = <0x1b200000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>,
+                                <&cmu_top DOUT_CLKCMU_BUSMC_BUS>;
+                       clock-names = "oscclk",
+                                     "dout_clkcmu_busmc_bus";
+               };
+
+               cmu_top: clock-controller@1b240000 {
+                       compatible = "samsung,exynosautov9-cmu-top";
+                       reg = <0x1b240000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>;
+                       clock-names = "oscclk";
+               };
+
                gic: interrupt-controller@10101000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;