wifi: rtw89: support parameter tables by RFE type
authorZong-Zhe Yang <kevin_yang@realtek.com>
Thu, 30 Mar 2023 08:03:31 +0000 (16:03 +0800)
committerKalle Valo <kvalo@kernel.org>
Fri, 14 Apr 2023 12:22:24 +0000 (15:22 +0300)
One chip can have different RFE (RF front end) types which we will judge
at runtime. And, different RFE types may use different RF parameter tables.
Though we didn't really meet this case previously, we are going to meet it
on upcoming chip RTL8851B. So, this commit handles parameter tables for
runtime RFE type.

We now encapsulate rtw89_txpwr_rule_<2/5/6>ghz tables into rtw89_rfe_parms.
Then, each chip defines its default parameter tables, and if needed, it can
configure extra parameter tables by RFE type. Finally we determine runtime
parameter tables by RFE type if one is configured. Otherwise, we use the
default parameter tables.

For now, we just move all settings under default parameter tables. We will
configure parameter tables by RFE types in separate commits afterwards.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230330080331.37155-1-pkshih@realtek.com
12 files changed:
drivers/net/wireless/realtek/rtw89/core.c
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/phy.c
drivers/net/wireless/realtek/rtw89/rtw8852a.c
drivers/net/wireless/realtek/rtw89/rtw8852a_table.c
drivers/net/wireless/realtek/rtw89/rtw8852a_table.h
drivers/net/wireless/realtek/rtw89/rtw8852b.c
drivers/net/wireless/realtek/rtw89/rtw8852b_table.c
drivers/net/wireless/realtek/rtw89/rtw8852b_table.h
drivers/net/wireless/realtek/rtw89/rtw8852c.c
drivers/net/wireless/realtek/rtw89/rtw8852c_table.c
drivers/net/wireless/realtek/rtw89/rtw8852c_table.h

index 79bce458d3a2e032bf2919e80c03cb8730580429..d91876eb2520b13035589b23f77eda735cf0d3a9 100644 (file)
@@ -3557,6 +3557,28 @@ static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev)
                rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV;
 }
 
+static void rtw89_core_setup_rfe_parms(struct rtw89_dev *rtwdev)
+{
+       const struct rtw89_chip_info *chip = rtwdev->chip;
+       const struct rtw89_rfe_parms_conf *conf = chip->rfe_parms_conf;
+       struct rtw89_efuse *efuse = &rtwdev->efuse;
+       u8 rfe_type = efuse->rfe_type;
+
+       if (!conf)
+               goto out;
+
+       while (conf->rfe_parms) {
+               if (rfe_type == conf->rfe_type) {
+                       rtwdev->rfe_parms = conf->rfe_parms;
+                       return;
+               }
+               conf++;
+       }
+
+out:
+       rtwdev->rfe_parms = chip->dflt_parms;
+}
+
 static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev)
 {
        int ret;
@@ -3578,6 +3600,7 @@ static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev)
                return ret;
 
        rtw89_core_setup_phycap(rtwdev);
+       rtw89_core_setup_rfe_parms(rtwdev);
 
        rtw89_mac_pwr_off(rtwdev);
 
index be937a420c70641d3f523202e77ce10b6f4fadae..e0c8b3a4c43fd80dc69b20882b30ad9a92ad80ed 100644 (file)
@@ -2990,6 +2990,41 @@ struct rtw89_txpwr_table {
                     const struct rtw89_txpwr_table *tbl);
 };
 
+struct rtw89_txpwr_rule_2ghz {
+       const s8 (*lmt)[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
+                      [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
+                      [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
+       const s8 (*lmt_ru)[RTW89_RU_NUM][RTW89_NTX_NUM]
+                         [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
+};
+
+struct rtw89_txpwr_rule_5ghz {
+       const s8 (*lmt)[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
+                      [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
+                      [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
+       const s8 (*lmt_ru)[RTW89_RU_NUM][RTW89_NTX_NUM]
+                         [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
+};
+
+struct rtw89_txpwr_rule_6ghz {
+       const s8 (*lmt)[RTW89_6G_BW_NUM][RTW89_NTX_NUM]
+                      [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
+                      [RTW89_REGD_NUM][RTW89_6G_CH_NUM];
+       const s8 (*lmt_ru)[RTW89_RU_NUM][RTW89_NTX_NUM]
+                         [RTW89_REGD_NUM][RTW89_6G_CH_NUM];
+};
+
+struct rtw89_rfe_parms {
+       struct rtw89_txpwr_rule_2ghz rule_2ghz;
+       struct rtw89_txpwr_rule_5ghz rule_5ghz;
+       struct rtw89_txpwr_rule_6ghz rule_6ghz;
+};
+
+struct rtw89_rfe_parms_conf {
+       const struct rtw89_rfe_parms *rfe_parms;
+       u8 rfe_type;
+};
+
 struct rtw89_page_regs {
        u32 hci_fc_ctrl;
        u32 ch_page_ctrl;
@@ -3127,21 +3162,10 @@ struct rtw89_chip_info {
        const struct rtw89_phy_dig_gain_table *dig_table;
        const struct rtw89_dig_regs *dig_regs;
        const struct rtw89_phy_tssi_dbw_table *tssi_dbw_table;
-       const s8 (*txpwr_lmt_2g)[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
-                               [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                               [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
-       const s8 (*txpwr_lmt_5g)[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
-                               [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                               [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
-       const s8 (*txpwr_lmt_6g)[RTW89_6G_BW_NUM][RTW89_NTX_NUM]
-                               [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                               [RTW89_REGD_NUM][RTW89_6G_CH_NUM];
-       const s8 (*txpwr_lmt_ru_2g)[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                  [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
-       const s8 (*txpwr_lmt_ru_5g)[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                  [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
-       const s8 (*txpwr_lmt_ru_6g)[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                  [RTW89_REGD_NUM][RTW89_6G_CH_NUM];
+
+       /* NULL if no rfe-specific, or a null-terminated array by rfe_parms */
+       const struct rtw89_rfe_parms_conf *rfe_parms_conf;
+       const struct rtw89_rfe_parms *dflt_parms;
 
        u8 txpwr_factor_rf;
        u8 txpwr_factor_mac;
@@ -3992,6 +4016,7 @@ struct rtw89_dev {
        struct rtw89_hw_scan_info scan_info;
        const struct rtw89_chip_info *chip;
        const struct rtw89_pci_info *pci_info;
+       const struct rtw89_rfe_parms *rfe_parms;
        struct rtw89_hal hal;
        struct rtw89_mcc_info mcc;
        struct rtw89_mac_info mac;
index cb0f6cc51d6bc4f8a27274c10a86bb4f0af4a4c5..53f0d964b7ae68a7242fa97d9568fc0de9da5bd6 100644 (file)
@@ -1617,29 +1617,35 @@ static u8 rtw89_channel_to_idx(struct rtw89_dev *rtwdev, u8 band, u8 channel)
 s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, u8 band,
                              u8 bw, u8 ntx, u8 rs, u8 bf, u8 ch)
 {
-       const struct rtw89_chip_info *chip = rtwdev->chip;
+       const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms;
+       const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz;
+       const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz;
+       const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz;
        u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch);
        u8 regd = rtw89_regd_get(rtwdev, band);
        s8 lmt = 0, sar;
 
        switch (band) {
        case RTW89_BAND_2G:
-               lmt = (*chip->txpwr_lmt_2g)[bw][ntx][rs][bf][regd][ch_idx];
-               if (!lmt)
-                       lmt = (*chip->txpwr_lmt_2g)[bw][ntx][rs][bf]
-                                                  [RTW89_WW][ch_idx];
+               lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx];
+               if (lmt)
+                       break;
+
+               lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx];
                break;
        case RTW89_BAND_5G:
-               lmt = (*chip->txpwr_lmt_5g)[bw][ntx][rs][bf][regd][ch_idx];
-               if (!lmt)
-                       lmt = (*chip->txpwr_lmt_5g)[bw][ntx][rs][bf]
-                                                  [RTW89_WW][ch_idx];
+               lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx];
+               if (lmt)
+                       break;
+
+               lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx];
                break;
        case RTW89_BAND_6G:
-               lmt = (*chip->txpwr_lmt_6g)[bw][ntx][rs][bf][regd][ch_idx];
-               if (!lmt)
-                       lmt = (*chip->txpwr_lmt_6g)[bw][ntx][rs][bf]
-                                                  [RTW89_WW][ch_idx];
+               lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx];
+               if (lmt)
+                       break;
+
+               lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx];
                break;
        default:
                rtw89_warn(rtwdev, "unknown band type: %d\n", band);
@@ -1862,29 +1868,35 @@ void rtw89_phy_fill_txpwr_limit(struct rtw89_dev *rtwdev,
 static s8 rtw89_phy_read_txpwr_limit_ru(struct rtw89_dev *rtwdev, u8 band,
                                        u8 ru, u8 ntx, u8 ch)
 {
-       const struct rtw89_chip_info *chip = rtwdev->chip;
+       const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms;
+       const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz;
+       const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz;
+       const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz;
        u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch);
        u8 regd = rtw89_regd_get(rtwdev, band);
        s8 lmt_ru = 0, sar;
 
        switch (band) {
        case RTW89_BAND_2G:
-               lmt_ru = (*chip->txpwr_lmt_ru_2g)[ru][ntx][regd][ch_idx];
-               if (!lmt_ru)
-                       lmt_ru = (*chip->txpwr_lmt_ru_2g)[ru][ntx]
-                                                        [RTW89_WW][ch_idx];
+               lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][regd][ch_idx];
+               if (lmt_ru)
+                       break;
+
+               lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx];
                break;
        case RTW89_BAND_5G:
-               lmt_ru = (*chip->txpwr_lmt_ru_5g)[ru][ntx][regd][ch_idx];
-               if (!lmt_ru)
-                       lmt_ru = (*chip->txpwr_lmt_ru_5g)[ru][ntx]
-                                                        [RTW89_WW][ch_idx];
+               lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][regd][ch_idx];
+               if (lmt_ru)
+                       break;
+
+               lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx];
                break;
        case RTW89_BAND_6G:
-               lmt_ru = (*chip->txpwr_lmt_ru_6g)[ru][ntx][regd][ch_idx];
-               if (!lmt_ru)
-                       lmt_ru = (*chip->txpwr_lmt_ru_6g)[ru][ntx]
-                                                        [RTW89_WW][ch_idx];
+               lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][ch_idx];
+               if (lmt_ru)
+                       break;
+
+               lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx];
                break;
        default:
                rtw89_warn(rtwdev, "unknown band type: %d\n", band);
index caaaa9f37d6b14055ab448b12acc42d32321abc8..499625338a6441002095318d0355cce3067d5df9 100644 (file)
@@ -2085,10 +2085,8 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
                                   &rtw89_8852a_phy_radiob_table,},
        .nctl_table             = &rtw89_8852a_phy_nctl_table,
        .byr_table              = &rtw89_8852a_byr_table,
-       .txpwr_lmt_2g           = &rtw89_8852a_txpwr_lmt_2g,
-       .txpwr_lmt_5g           = &rtw89_8852a_txpwr_lmt_5g,
-       .txpwr_lmt_ru_2g        = &rtw89_8852a_txpwr_lmt_ru_2g,
-       .txpwr_lmt_ru_5g        = &rtw89_8852a_txpwr_lmt_ru_5g,
+       .dflt_parms             = &rtw89_8852a_dflt_parms,
+       .rfe_parms_conf         = NULL,
        .txpwr_factor_rf        = 2,
        .txpwr_factor_mac       = 1,
        .dig_table              = &rtw89_8852a_phy_dig_table,
index 320bcd4852c6703d214e46997e8e7f48279ed24a..be54194558ffd00db720e2b414bf193a29a39624 100644 (file)
@@ -43377,6 +43377,7 @@ static const s8 _txpwr_track_delta_swingidx_2g_cck_a_p[] = {
        0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5,
         6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10};
 
+static
 const s8 rtw89_8852a_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
                                 [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
                                 [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = {
@@ -45566,6 +45567,7 @@ const s8 rtw89_8852a_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
        [1][1][2][1][RTW89_UK][13] = 127,
 };
 
+static
 const s8 rtw89_8852a_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
                                 [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
                                 [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = {
@@ -47898,6 +47900,7 @@ const s8 rtw89_8852a_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
        [2][1][2][1][RTW89_UK][41] = 40,
 };
 
+static
 const s8 rtw89_8852a_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
                                    [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = {
        [0][0][RTW89_WW][0] = 32,
@@ -48994,6 +48997,7 @@ const s8 rtw89_8852a_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
        [2][1][RTW89_UK][13] = 127,
 };
 
+static
 const s8 rtw89_8852a_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]
                                    [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = {
        [0][0][RTW89_WW][0] = 22,
@@ -51043,3 +51047,14 @@ const struct rtw89_phy_dig_gain_table rtw89_8852a_phy_dig_table = {
        .cfg_lna_a = &rtw89_8852a_lna_gain_a_table,
        .cfg_tia_a = &rtw89_8852a_tia_gain_a_table
 };
+
+const struct rtw89_rfe_parms rtw89_8852a_dflt_parms = {
+       .rule_2ghz = {
+               .lmt = &rtw89_8852a_txpwr_lmt_2g,
+               .lmt_ru = &rtw89_8852a_txpwr_lmt_ru_2g,
+       },
+       .rule_5ghz = {
+               .lmt = &rtw89_8852a_txpwr_lmt_5g,
+               .lmt_ru = &rtw89_8852a_txpwr_lmt_ru_5g,
+       },
+};
index 91379650628647578fb2482471d1b11669ced866..41c379b1044d77cc6eaf45e9fa735ce09320ac79 100644 (file)
@@ -14,15 +14,6 @@ extern const struct rtw89_phy_table rtw89_8852a_phy_nctl_table;
 extern const struct rtw89_txpwr_table rtw89_8852a_byr_table;
 extern const struct rtw89_phy_dig_gain_table rtw89_8852a_phy_dig_table;
 extern const struct rtw89_txpwr_track_cfg rtw89_8852a_trk_cfg;
-extern const s8 rtw89_8852a_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
-                                       [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                                       [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
-extern const s8 rtw89_8852a_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
-                                       [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                                       [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
-extern const s8 rtw89_8852a_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                          [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
-extern const s8 rtw89_8852a_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                          [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
+extern const struct rtw89_rfe_parms rtw89_8852a_dflt_parms;
 
 #endif
index 6a3a28d729db6ee12b568dae71b1a1959829c28f..55b83aad2410302c89364afa052cfe59bc3242c9 100644 (file)
@@ -2506,10 +2506,8 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
                                   &rtw89_8852b_phy_radiob_table,},
        .nctl_table             = &rtw89_8852b_phy_nctl_table,
        .byr_table              = &rtw89_8852b_byr_table,
-       .txpwr_lmt_2g           = &rtw89_8852b_txpwr_lmt_2g,
-       .txpwr_lmt_5g           = &rtw89_8852b_txpwr_lmt_5g,
-       .txpwr_lmt_ru_2g        = &rtw89_8852b_txpwr_lmt_ru_2g,
-       .txpwr_lmt_ru_5g        = &rtw89_8852b_txpwr_lmt_ru_5g,
+       .dflt_parms             = &rtw89_8852b_dflt_parms,
+       .rfe_parms_conf         = NULL,
        .txpwr_factor_rf        = 2,
        .txpwr_factor_mac       = 1,
        .dig_table              = NULL,
index a6734965361f707d0323e37cda1bb0614755e421..904cdb9e56fa7f2266f0133bff9fb9351d5de95d 100644 (file)
@@ -14706,6 +14706,7 @@ const u8 rtw89_8852b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM]
        [1][1][RTW89_UKRAINE] = 0,
 };
 
+static
 const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
                                 [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
                                 [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = {
@@ -16895,6 +16896,7 @@ const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
        [1][1][2][1][RTW89_UK][13] = 127,
 };
 
+static
 const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
                                 [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
                                 [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = {
@@ -19539,6 +19541,7 @@ const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
        [2][1][2][1][RTW89_UK][49] = 127,
 };
 
+static
 const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
                                    [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = {
        [0][0][RTW89_WW][0] = 32,
@@ -20635,6 +20638,7 @@ const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
        [2][1][RTW89_UK][13] = 127,
 };
 
+static
 const s8 rtw89_8852b_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]
                                    [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = {
        [0][0][RTW89_WW][0] = 24,
@@ -22875,3 +22879,14 @@ const struct rtw89_txpwr_track_cfg rtw89_8852b_trk_cfg = {
        .delta_swingidx_2g_cck_a_n = _txpwr_track_delta_swingidx_2g_cck_a_n,
        .delta_swingidx_2g_cck_a_p = _txpwr_track_delta_swingidx_2g_cck_a_p,
 };
+
+const struct rtw89_rfe_parms rtw89_8852b_dflt_parms = {
+       .rule_2ghz = {
+               .lmt = &rtw89_8852b_txpwr_lmt_2g,
+               .lmt_ru = &rtw89_8852b_txpwr_lmt_ru_2g,
+       },
+       .rule_5ghz = {
+               .lmt = &rtw89_8852b_txpwr_lmt_5g,
+               .lmt_ru = &rtw89_8852b_txpwr_lmt_ru_5g,
+       },
+};
index 114337ac9fb001e76fe8669e017270ea5d4b4810..5f4161496a589774fc176b5d8dd5e1698038c843 100644 (file)
@@ -16,15 +16,6 @@ extern const struct rtw89_txpwr_table rtw89_8852b_byr_table;
 extern const struct rtw89_txpwr_track_cfg rtw89_8852b_trk_cfg;
 extern const u8 rtw89_8852b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM]
                                    [RTW89_REGD_NUM];
-extern const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
-                                       [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                                       [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
-extern const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
-                                       [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                                       [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
-extern const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                          [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
-extern const s8 rtw89_8852b_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                          [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
+extern const struct rtw89_rfe_parms rtw89_8852b_dflt_parms;
 
 #endif
index c5147d965160b103db8e84059ad94afc44eeac67..2be9e89b1965cd5e2fda4f3c2a1adbd7e20f06c6 100644 (file)
@@ -2817,12 +2817,8 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
                                   &rtw89_8852c_phy_radioa_table,},
        .nctl_table             = &rtw89_8852c_phy_nctl_table,
        .byr_table              = &rtw89_8852c_byr_table,
-       .txpwr_lmt_2g           = &rtw89_8852c_txpwr_lmt_2g,
-       .txpwr_lmt_5g           = &rtw89_8852c_txpwr_lmt_5g,
-       .txpwr_lmt_6g           = &rtw89_8852c_txpwr_lmt_6g,
-       .txpwr_lmt_ru_2g        = &rtw89_8852c_txpwr_lmt_ru_2g,
-       .txpwr_lmt_ru_5g        = &rtw89_8852c_txpwr_lmt_ru_5g,
-       .txpwr_lmt_ru_6g        = &rtw89_8852c_txpwr_lmt_ru_6g,
+       .dflt_parms             = &rtw89_8852c_dflt_parms,
+       .rfe_parms_conf         = NULL,
        .txpwr_factor_rf        = 2,
        .txpwr_factor_mac       = 1,
        .dig_table              = NULL,
index 96c264a057ff46f2e657708a2982219315e7e97f..7011e5a6f8fdac327bc05ac3fda8303ddd1db7eb 100644 (file)
@@ -28590,6 +28590,7 @@ const u8 rtw89_8852c_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM]
        [2][1][RTW89_KCC] = 0,
 };
 
+static
 const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
                                 [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
                                 [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = {
@@ -30107,6 +30108,7 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
        [1][1][2][1][RTW89_UK][13] = 127,
 };
 
+static
 const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
                                 [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
                                 [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = {
@@ -32020,6 +32022,7 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
        [3][1][2][1][RTW89_UK][45] = 127,
 };
 
+static
 const s8 rtw89_8852c_txpwr_lmt_6g[RTW89_6G_BW_NUM][RTW89_NTX_NUM]
                                 [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
                                 [RTW89_REGD_NUM][RTW89_6G_CH_NUM] = {
@@ -33977,6 +33980,7 @@ const s8 rtw89_8852c_txpwr_lmt_6g[RTW89_6G_BW_NUM][RTW89_NTX_NUM]
        [3][1][2][1][RTW89_KCC][112] = 127,
 };
 
+static
 const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
                                    [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = {
        [0][0][RTW89_WW][0] = 32,
@@ -34737,6 +34741,7 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
        [2][1][RTW89_UK][13] = 127,
 };
 
+static
 const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]
                                    [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = {
        [0][0][RTW89_WW][0] = 16,
@@ -36253,6 +36258,7 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]
        [2][1][RTW89_UK][52] = 127,
 };
 
+static
 const s8 rtw89_8852c_txpwr_lmt_ru_6g[RTW89_RU_NUM][RTW89_NTX_NUM]
                                    [RTW89_REGD_NUM][RTW89_6G_CH_NUM] = {
        [0][0][RTW89_WW][0] = -16,
@@ -37472,3 +37478,18 @@ const struct rtw89_phy_tssi_dbw_table rtw89_8852c_tssi_dbw_table = {
        .data[RTW89_TSSI_BANDEDGE_MID] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
        .data[RTW89_TSSI_BANDEDGE_HIGH] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
 };
+
+const struct rtw89_rfe_parms rtw89_8852c_dflt_parms = {
+       .rule_2ghz = {
+               .lmt = &rtw89_8852c_txpwr_lmt_2g,
+               .lmt_ru = &rtw89_8852c_txpwr_lmt_ru_2g,
+       },
+       .rule_5ghz = {
+               .lmt = &rtw89_8852c_txpwr_lmt_5g,
+               .lmt_ru = &rtw89_8852c_txpwr_lmt_ru_5g,
+       },
+       .rule_6ghz = {
+               .lmt = &rtw89_8852c_txpwr_lmt_6g,
+               .lmt_ru = &rtw89_8852c_txpwr_lmt_ru_6g,
+       },
+};
index 7d71a92e2d27cb7669fb76bab1f8d51f97168848..6da1849fb1fac74e1bdba624990600fa2d4986ce 100644 (file)
@@ -17,20 +17,6 @@ extern const struct rtw89_phy_tssi_dbw_table rtw89_8852c_tssi_dbw_table;
 extern const struct rtw89_txpwr_track_cfg rtw89_8852c_trk_cfg;
 extern const u8 rtw89_8852c_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM]
                                    [RTW89_REGD_NUM];
-extern const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
-                                       [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                                       [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
-extern const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
-                                       [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                                       [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
-extern const s8 rtw89_8852c_txpwr_lmt_6g[RTW89_6G_BW_NUM][RTW89_NTX_NUM]
-                                       [RTW89_RS_LMT_NUM][RTW89_BF_NUM]
-                                       [RTW89_REGD_NUM][RTW89_6G_CH_NUM];
-extern const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                          [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
-extern const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                          [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
-extern const s8 rtw89_8852c_txpwr_lmt_ru_6g[RTW89_RU_NUM][RTW89_NTX_NUM]
-                                          [RTW89_REGD_NUM][RTW89_6G_CH_NUM];
+extern const struct rtw89_rfe_parms rtw89_8852c_dflt_parms;
 
 #endif