phy: qcom: qmp: move common functions to common header

Move common init tables code to the common header phy-qcom-qmp-common.h.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-3-a463d0b57836@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 1ad10110dd2544b77ae38a1459497ae6e2905b84..f6e9471da51a881ecdb694514e5c8c04a7713f40 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -25,6 +25,8 @@
 
 #include <dt-bindings/phy/phy-qcom-qmp.h>
 
+#include "phy-qcom-qmp-common.h"
+
 #include "phy-qcom-qmp.h"
 #include "phy-qcom-qmp-pcs-misc-v3.h"
 #include "phy-qcom-qmp-pcs-usb-v4.h"
@@ -72,30 +74,6 @@
 
 #define PHY_INIT_COMPLETE_TIMEOUT              10000
 
-struct qmp_phy_init_tbl {
-       unsigned int offset;
-       unsigned int val;
-       /*
-        * mask of lanes for which this register is written
-        * for cases when second lane needs different values
-        */
-       u8 lane_mask;
-};
-
-#define QMP_PHY_INIT_CFG(o, v)         \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = 0xff,      \
-       }
-
-#define QMP_PHY_INIT_CFG_LANE(o, v, l) \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = l,         \
-       }
-
 /* set of registers with offsets different per-PHY */
 enum qphy_reg_layout {
        /* PCS registers */
@@ -2031,55 +2009,29 @@ static const struct qmp_phy_cfg sm8550_usb3dpphy_cfg = {
        .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
 };
 
-static void qmp_combo_configure_lane(void __iomem *base,
-                                       const struct qmp_phy_init_tbl tbl[],
-                                       int num,
-                                       u8 lane_mask)
-{
-       int i;
-       const struct qmp_phy_init_tbl *t = tbl;
-
-       if (!t)
-               return;
-
-       for (i = 0; i < num; i++, t++) {
-               if (!(t->lane_mask & lane_mask))
-                       continue;
-
-               writel(t->val, base + t->offset);
-       }
-}
-
-static void qmp_combo_configure(void __iomem *base,
-                                  const struct qmp_phy_init_tbl tbl[],
-                                  int num)
-{
-       qmp_combo_configure_lane(base, tbl, num, 0xff);
-}
-
 static int qmp_combo_dp_serdes_init(struct qmp_combo *qmp)
 {
        const struct qmp_phy_cfg *cfg = qmp->cfg;
        void __iomem *serdes = qmp->dp_serdes;
        const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts;
 
-       qmp_combo_configure(serdes, cfg->dp_serdes_tbl, cfg->dp_serdes_tbl_num);
+       qmp_configure(serdes, cfg->dp_serdes_tbl, cfg->dp_serdes_tbl_num);
 
        switch (dp_opts->link_rate) {
        case 1620:
-               qmp_combo_configure(serdes, cfg->serdes_tbl_rbr,
+               qmp_configure(serdes, cfg->serdes_tbl_rbr,
                                cfg->serdes_tbl_rbr_num);
                break;
        case 2700:
-               qmp_combo_configure(serdes, cfg->serdes_tbl_hbr,
+               qmp_configure(serdes, cfg->serdes_tbl_hbr,
                                cfg->serdes_tbl_hbr_num);
                break;
        case 5400:
-               qmp_combo_configure(serdes, cfg->serdes_tbl_hbr2,
+               qmp_configure(serdes, cfg->serdes_tbl_hbr2,
                                cfg->serdes_tbl_hbr2_num);
                break;
        case 8100:
-               qmp_combo_configure(serdes, cfg->serdes_tbl_hbr3,
+               qmp_configure(serdes, cfg->serdes_tbl_hbr3,
                                cfg->serdes_tbl_hbr3_num);
                break;
        default:
@@ -2681,8 +2633,8 @@ static int qmp_combo_dp_power_on(struct phy *phy)
 
        qmp_combo_dp_serdes_init(qmp);
 
-       qmp_combo_configure_lane(tx, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 1);
-       qmp_combo_configure_lane(tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2);
+       qmp_configure_lane(tx, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 1);
+       qmp_configure_lane(tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2);
 
        /* Configure special DP tx tunings */
        cfg->configure_dp_tx(qmp);
@@ -2724,7 +2676,7 @@ static int qmp_combo_usb_power_on(struct phy *phy)
        unsigned int val;
        int ret;
 
-       qmp_combo_configure(serdes, cfg->serdes_tbl, cfg->serdes_tbl_num);
+       qmp_configure(serdes, cfg->serdes_tbl, cfg->serdes_tbl_num);
 
        ret = clk_prepare_enable(qmp->pipe_clk);
        if (ret) {
@@ -2733,16 +2685,16 @@ static int qmp_combo_usb_power_on(struct phy *phy)
        }
 
        /* Tx, Rx, and PCS configurations */
-       qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
-       qmp_combo_configure_lane(tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2);
+       qmp_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
+       qmp_configure_lane(tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2);
 
-       qmp_combo_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
-       qmp_combo_configure_lane(rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2);
+       qmp_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
+       qmp_configure_lane(rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2);
 
-       qmp_combo_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
+       qmp_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
 
        if (pcs_usb)
-               qmp_combo_configure(pcs_usb, cfg->pcs_usb_tbl, cfg->pcs_usb_tbl_num);
+               qmp_configure(pcs_usb, cfg->pcs_usb_tbl, cfg->pcs_usb_tbl_num);
 
        if (cfg->has_pwrdn_delay)
                usleep_range(10, 20);

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-common.h b/drivers/phy/qualcomm/phy-qcom-qmp-common.h
new file mode 100644 (file)
index 0000000..7993842
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-common.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef QCOM_PHY_QMP_COMMON_H_
+#define QCOM_PHY_QMP_COMMON_H_
+
+struct qmp_phy_init_tbl {
+       unsigned int offset;
+       unsigned int val;
+       /*
+        * mask of lanes for which this register is written
+        * for cases when second lane needs different values
+        */
+       u8 lane_mask;
+};
+
+#define QMP_PHY_INIT_CFG(o, v)         \
+       {                               \
+               .offset = o,            \
+               .val = v,               \
+               .lane_mask = 0xff,      \
+       }
+
+#define QMP_PHY_INIT_CFG_LANE(o, v, l) \
+       {                               \
+               .offset = o,            \
+               .val = v,               \
+               .lane_mask = l,         \
+       }
+
+static inline void qmp_configure_lane(void __iomem *base,
+                                          const struct qmp_phy_init_tbl tbl[],
+                                          int num,
+                                          u8 lane_mask)
+{
+       int i;
+       const struct qmp_phy_init_tbl *t = tbl;
+
+       if (!t)
+               return;
+
+       for (i = 0; i < num; i++, t++) {
+               if (!(t->lane_mask & lane_mask))
+                       continue;
+
+               writel(t->val, base + t->offset);
+       }
+}
+
+static inline void qmp_configure(void __iomem *base,
+                                     const struct qmp_phy_init_tbl tbl[],
+                                     int num)
+{
+       qmp_configure_lane(base, tbl, num, 0xff);
+}
+
+#endif

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
index ab61a9c73b189eabffbbe64fc6889338a00091be..07c6f20a49d43e8cb7ebdd0321c82479c5a4ad45 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
@@ -19,6 +19,8 @@
 #include <linux/reset.h>
 #include <linux/slab.h>
 
+#include "phy-qcom-qmp-common.h"
+
 #include "phy-qcom-qmp.h"
 
 /* QPHY_SW_RESET bit */
@@ -39,30 +41,6 @@
 #define POWER_DOWN_DELAY_US_MIN                        10
 #define POWER_DOWN_DELAY_US_MAX                        20
 
-struct qmp_phy_init_tbl {
-       unsigned int offset;
-       unsigned int val;
-       /*
-        * mask of lanes for which this register is written
-        * for cases when second lane needs different values
-        */
-       u8 lane_mask;
-};
-
-#define QMP_PHY_INIT_CFG(o, v)         \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = 0xff,      \
-       }
-
-#define QMP_PHY_INIT_CFG_LANE(o, v, l) \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = l,         \
-       }
-
 /* set of registers with offsets different per-PHY */
 enum qphy_reg_layout {
        /* Common block control registers */
@@ -307,32 +285,6 @@ static const struct qmp_phy_cfg msm8996_pciephy_cfg = {
        .regs                   = pciephy_regs_layout,
 };
 
-static void qmp_pcie_msm8996_configure_lane(void __iomem *base,
-                                       const struct qmp_phy_init_tbl tbl[],
-                                       int num,
-                                       u8 lane_mask)
-{
-       int i;
-       const struct qmp_phy_init_tbl *t = tbl;
-
-       if (!t)
-               return;
-
-       for (i = 0; i < num; i++, t++) {
-               if (!(t->lane_mask & lane_mask))
-                       continue;
-
-               writel(t->val, base + t->offset);
-       }
-}
-
-static void qmp_pcie_msm8996_configure(void __iomem *base,
-                                  const struct qmp_phy_init_tbl tbl[],
-                                  int num)
-{
-       qmp_pcie_msm8996_configure_lane(base, tbl, num, 0xff);
-}
-
 static int qmp_pcie_msm8996_serdes_init(struct qmp_phy *qphy)
 {
        struct qcom_qmp *qmp = qphy->qmp;
@@ -344,7 +296,7 @@ static int qmp_pcie_msm8996_serdes_init(struct qmp_phy *qphy)
        unsigned int val;
        int ret;
 
-       qmp_pcie_msm8996_configure(serdes, serdes_tbl, serdes_tbl_num);
+       qmp_configure(serdes, serdes_tbl, serdes_tbl_num);
 
        qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], SW_RESET);
        qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
@@ -487,9 +439,9 @@ static int qmp_pcie_msm8996_power_on(struct phy *phy)
        }
 
        /* Tx, Rx, and PCS configurations */
-       qmp_pcie_msm8996_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
-       qmp_pcie_msm8996_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
-       qmp_pcie_msm8996_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
+       qmp_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
+       qmp_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
+       qmp_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
 
        /*
         * Pull out PHY from POWER DOWN state.

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
index af14af878d3ee3b9d42f1920591015195426e3b2..a4c8b6e9a7df888a40fbbebbd0c3d3af3dc01761 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -22,6 +22,8 @@
 #include <linux/reset.h>
 #include <linux/slab.h>
 
+#include "phy-qcom-qmp-common.h"
+
 #include "phy-qcom-qmp.h"
 #include "phy-qcom-qmp-pcs-misc-v3.h"
 #include "phy-qcom-qmp-pcs-pcie-v4.h"
@@ -46,30 +48,6 @@
 
 #define PHY_INIT_COMPLETE_TIMEOUT              10000
 
-struct qmp_phy_init_tbl {
-       unsigned int offset;
-       unsigned int val;
-       /*
-        * mask of lanes for which this register is written
-        * for cases when second lane needs different values
-        */
-       u8 lane_mask;
-};
-
-#define QMP_PHY_INIT_CFG(o, v)         \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = 0xff,      \
-       }
-
-#define QMP_PHY_INIT_CFG_LANE(o, v, l) \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = l,         \
-       }
-
 /* set of registers with offsets different per-PHY */
 enum qphy_reg_layout {
        /* PCS registers */
@@ -3365,32 +3343,6 @@ static const struct qmp_phy_cfg x1e80100_qmp_gen4x2_pciephy_cfg = {
        .has_nocsr_reset        = true,
 };
 
-static void qmp_pcie_configure_lane(void __iomem *base,
-                                       const struct qmp_phy_init_tbl tbl[],
-                                       int num,
-                                       u8 lane_mask)
-{
-       int i;
-       const struct qmp_phy_init_tbl *t = tbl;
-
-       if (!t)
-               return;
-
-       for (i = 0; i < num; i++, t++) {
-               if (!(t->lane_mask & lane_mask))
-                       continue;
-
-               writel(t->val, base + t->offset);
-       }
-}
-
-static void qmp_pcie_configure(void __iomem *base,
-                                       const struct qmp_phy_init_tbl tbl[],
-                                       int num)
-{
-       qmp_pcie_configure_lane(base, tbl, num, 0xff);
-}
-
 static void qmp_pcie_init_port_b(struct qmp_pcie *qmp, const struct qmp_phy_cfg_tbls *tbls)
 {
        const struct qmp_phy_cfg *cfg = qmp->cfg;
@@ -3402,11 +3354,11 @@ static void qmp_pcie_init_port_b(struct qmp_pcie *qmp, const struct qmp_phy_cfg_
        tx4 = qmp->port_b + offs->tx2;
        rx4 = qmp->port_b + offs->rx2;
 
-       qmp_pcie_configure_lane(tx3, tbls->tx, tbls->tx_num, 1);
-       qmp_pcie_configure_lane(rx3, tbls->rx, tbls->rx_num, 1);
+       qmp_configure_lane(tx3, tbls->tx, tbls->tx_num, 1);
+       qmp_configure_lane(rx3, tbls->rx, tbls->rx_num, 1);
 
-       qmp_pcie_configure_lane(tx4, tbls->tx, tbls->tx_num, 2);
-       qmp_pcie_configure_lane(rx4, tbls->rx, tbls->rx_num, 2);
+       qmp_configure_lane(tx4, tbls->tx, tbls->tx_num, 2);
+       qmp_configure_lane(rx4, tbls->rx, tbls->rx_num, 2);
 }
 
 static void qmp_pcie_init_registers(struct qmp_pcie *qmp, const struct qmp_phy_cfg_tbls *tbls)
@@ -3424,25 +3376,25 @@ static void qmp_pcie_init_registers(struct qmp_pcie *qmp, const struct qmp_phy_c
        if (!tbls)
                return;
 
-       qmp_pcie_configure(serdes, tbls->serdes, tbls->serdes_num);
+       qmp_configure(serdes, tbls->serdes, tbls->serdes_num);
 
-       qmp_pcie_configure_lane(tx, tbls->tx, tbls->tx_num, 1);
-       qmp_pcie_configure_lane(rx, tbls->rx, tbls->rx_num, 1);
+       qmp_configure_lane(tx, tbls->tx, tbls->tx_num, 1);
+       qmp_configure_lane(rx, tbls->rx, tbls->rx_num, 1);
 
        if (cfg->lanes >= 2) {
-               qmp_pcie_configure_lane(tx2, tbls->tx, tbls->tx_num, 2);
-               qmp_pcie_configure_lane(rx2, tbls->rx, tbls->rx_num, 2);
+               qmp_configure_lane(tx2, tbls->tx, tbls->tx_num, 2);
+               qmp_configure_lane(rx2, tbls->rx, tbls->rx_num, 2);
        }
 
-       qmp_pcie_configure(pcs, tbls->pcs, tbls->pcs_num);
-       qmp_pcie_configure(pcs_misc, tbls->pcs_misc, tbls->pcs_misc_num);
+       qmp_configure(pcs, tbls->pcs, tbls->pcs_num);
+       qmp_configure(pcs_misc, tbls->pcs_misc, tbls->pcs_misc_num);
 
        if (cfg->lanes >= 4 && qmp->tcsr_4ln_config) {
-               qmp_pcie_configure(serdes, cfg->serdes_4ln_tbl, cfg->serdes_4ln_num);
+               qmp_configure(serdes, cfg->serdes_4ln_tbl, cfg->serdes_4ln_num);
                qmp_pcie_init_port_b(qmp, tbls);
        }
 
-       qmp_pcie_configure(ln_shrd, tbls->ln_shrd, tbls->ln_shrd_num);
+       qmp_configure(ln_shrd, tbls->ln_shrd, tbls->ln_shrd_num);
 }
 
 static int qmp_pcie_init(struct phy *phy)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index 490f4cecf054e1b73eea156cdda6098d6f5a3dc4..01a96c60c9136e84742da696cc8ce5653cec5ada 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -20,6 +20,9 @@
 #include <linux/slab.h>
 
 #include <ufs/unipro.h>
+
+#include "phy-qcom-qmp-common.h"
+
 #include "phy-qcom-qmp.h"
 #include "phy-qcom-qmp-pcs-ufs-v2.h"
 #include "phy-qcom-qmp-pcs-ufs-v3.h"
@@ -43,30 +46,6 @@
 
 #define NUM_OVERLAY                            2
 
-struct qmp_phy_init_tbl {
-       unsigned int offset;
-       unsigned int val;
-       /*
-        * mask of lanes for which this register is written
-        * for cases when second lane needs different values
-        */
-       u8 lane_mask;
-};
-
-#define QMP_PHY_INIT_CFG(o, v)         \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = 0xff,      \
-       }
-
-#define QMP_PHY_INIT_CFG_LANE(o, v, l) \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = l,         \
-       }
-
 /* set of registers with offsets different per-PHY */
 enum qphy_reg_layout {
        /* PCS registers */
@@ -1483,37 +1462,11 @@ static const struct qmp_phy_cfg sm8650_ufsphy_cfg = {
        .regs                   = ufsphy_v6_regs_layout,
 };
 
-static void qmp_ufs_configure_lane(void __iomem *base,
-                                       const struct qmp_phy_init_tbl tbl[],
-                                       int num,
-                                       u8 lane_mask)
-{
-       int i;
-       const struct qmp_phy_init_tbl *t = tbl;
-
-       if (!t)
-               return;
-
-       for (i = 0; i < num; i++, t++) {
-               if (!(t->lane_mask & lane_mask))
-                       continue;
-
-               writel(t->val, base + t->offset);
-       }
-}
-
-static void qmp_ufs_configure(void __iomem *base,
-                                  const struct qmp_phy_init_tbl tbl[],
-                                  int num)
-{
-       qmp_ufs_configure_lane(base, tbl, num, 0xff);
-}
-
 static void qmp_ufs_serdes_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls *tbls)
 {
        void __iomem *serdes = qmp->serdes;
 
-       qmp_ufs_configure(serdes, tbls->serdes, tbls->serdes_num);
+       qmp_configure(serdes, tbls->serdes, tbls->serdes_num);
 }
 
 static void qmp_ufs_lanes_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls *tbls)
@@ -1522,12 +1475,12 @@ static void qmp_ufs_lanes_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbl
        void __iomem *tx = qmp->tx;
        void __iomem *rx = qmp->rx;
 
-       qmp_ufs_configure_lane(tx, tbls->tx, tbls->tx_num, 1);
-       qmp_ufs_configure_lane(rx, tbls->rx, tbls->rx_num, 1);
+       qmp_configure_lane(tx, tbls->tx, tbls->tx_num, 1);
+       qmp_configure_lane(rx, tbls->rx, tbls->rx_num, 1);
 
        if (cfg->lanes >= 2) {
-               qmp_ufs_configure_lane(qmp->tx2, tbls->tx, tbls->tx_num, 2);
-               qmp_ufs_configure_lane(qmp->rx2, tbls->rx, tbls->rx_num, 2);
+               qmp_configure_lane(qmp->tx2, tbls->tx, tbls->tx_num, 2);
+               qmp_configure_lane(qmp->rx2, tbls->rx, tbls->rx_num, 2);
        }
 }
 
@@ -1535,7 +1488,7 @@ static void qmp_ufs_pcs_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls
 {
        void __iomem *pcs = qmp->pcs;
 
-       qmp_ufs_configure(pcs, tbls->pcs, tbls->pcs_num);
+       qmp_configure(pcs, tbls->pcs, tbls->pcs_num);
 }
 
 static int qmp_ufs_get_gear_overlay(struct qmp_ufs *qmp, const struct qmp_phy_cfg *cfg)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index e62539ce99a6785355a54f18058e55672a434988..a4d2bb3ae6059392de936caa68641ca06db27c7e 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -19,6 +19,8 @@
 #include <linux/reset.h>
 #include <linux/slab.h>
 
+#include "phy-qcom-qmp-common.h"
+
 #include "phy-qcom-qmp.h"
 #include "phy-qcom-qmp-pcs-misc-v3.h"
 #include "phy-qcom-qmp-pcs-misc-v4.h"
@@ -64,30 +66,6 @@
 
 #define PHY_INIT_COMPLETE_TIMEOUT              10000
 
-struct qmp_phy_init_tbl {
-       unsigned int offset;
-       unsigned int val;
-       /*
-        * mask of lanes for which this register is written
-        * for cases when second lane needs different values
-        */
-       u8 lane_mask;
-};
-
-#define QMP_PHY_INIT_CFG(o, v)         \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = 0xff,      \
-       }
-
-#define QMP_PHY_INIT_CFG_LANE(o, v, l) \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = l,         \
-       }
-
 /* set of registers with offsets different per-PHY */
 enum qphy_reg_layout {
        /* PCS registers */
@@ -1631,32 +1609,6 @@ static const struct qmp_phy_cfg x1e80100_usb3_uniphy_cfg = {
        .regs                   = qmp_v7_usb3phy_regs_layout,
 };
 
-static void qmp_usb_configure_lane(void __iomem *base,
-                                       const struct qmp_phy_init_tbl tbl[],
-                                       int num,
-                                       u8 lane_mask)
-{
-       int i;
-       const struct qmp_phy_init_tbl *t = tbl;
-
-       if (!t)
-               return;
-
-       for (i = 0; i < num; i++, t++) {
-               if (!(t->lane_mask & lane_mask))
-                       continue;
-
-               writel(t->val, base + t->offset);
-       }
-}
-
-static void qmp_usb_configure(void __iomem *base,
-                                  const struct qmp_phy_init_tbl tbl[],
-                                  int num)
-{
-       qmp_usb_configure_lane(base, tbl, num, 0xff);
-}
-
 static int qmp_usb_serdes_init(struct qmp_usb *qmp)
 {
        const struct qmp_phy_cfg *cfg = qmp->cfg;
@@ -1664,7 +1616,7 @@ static int qmp_usb_serdes_init(struct qmp_usb *qmp)
        const struct qmp_phy_init_tbl *serdes_tbl = cfg->serdes_tbl;
        int serdes_tbl_num = cfg->serdes_tbl_num;
 
-       qmp_usb_configure(serdes, serdes_tbl, serdes_tbl_num);
+       qmp_configure(serdes, serdes_tbl, serdes_tbl_num);
 
        return 0;
 }
@@ -1745,13 +1697,13 @@ static int qmp_usb_power_on(struct phy *phy)
        }
 
        /* Tx, Rx, and PCS configurations */
-       qmp_usb_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
-       qmp_usb_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
+       qmp_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
+       qmp_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
 
-       qmp_usb_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
+       qmp_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
 
        if (pcs_usb)
-               qmp_usb_configure(pcs_usb, cfg->pcs_usb_tbl, cfg->pcs_usb_tbl_num);
+               qmp_configure(pcs_usb, cfg->pcs_usb_tbl, cfg->pcs_usb_tbl_num);
 
        if (cfg->has_pwrdn_delay)
                usleep_range(10, 20);

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
index 02babec76881e8d3ef147858a57c731f4f809f54..2de440f0bf0236d276e70ef1f1f61a4358980803 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c
@@ -23,6 +23,8 @@
 #include <linux/usb/typec.h>
 #include <linux/usb/typec_mux.h>
 
+#include "phy-qcom-qmp-common.h"
+
 #include "phy-qcom-qmp.h"
 #include "phy-qcom-qmp-pcs-misc-v3.h"
 
@@ -60,30 +62,6 @@
 
 #define PHY_INIT_COMPLETE_TIMEOUT              10000
 
-struct qmp_phy_init_tbl {
-       unsigned int offset;
-       unsigned int val;
-       /*
-        * mask of lanes for which this register is written
-        * for cases when second lane needs different values
-        */
-       u8 lane_mask;
-};
-
-#define QMP_PHY_INIT_CFG(o, v)         \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = 0xff,      \
-       }
-
-#define QMP_PHY_INIT_CFG_LANE(o, v, l) \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .lane_mask = l,         \
-       }
-
 /* set of registers with offsets different per-PHY */
 enum qphy_reg_layout {
        /* PCS registers */
@@ -511,32 +489,6 @@ static const struct qmp_phy_cfg sdm660_usb3phy_cfg = {
        .regs                   = qmp_v3_usb3phy_regs_layout_qcm2290,
 };
 
-static void qmp_usbc_configure_lane(void __iomem *base,
-                                       const struct qmp_phy_init_tbl tbl[],
-                                       int num,
-                                       u8 lane_mask)
-{
-       int i;
-       const struct qmp_phy_init_tbl *t = tbl;
-
-       if (!t)
-               return;
-
-       for (i = 0; i < num; i++, t++) {
-               if (!(t->lane_mask & lane_mask))
-                       continue;
-
-               writel(t->val, base + t->offset);
-       }
-}
-
-static void qmp_usbc_configure(void __iomem *base,
-                                  const struct qmp_phy_init_tbl tbl[],
-                                  int num)
-{
-       qmp_usbc_configure_lane(base, tbl, num, 0xff);
-}
-
 static int qmp_usbc_init(struct phy *phy)
 {
        struct qmp_usbc *qmp = phy_get_drvdata(phy);
@@ -609,7 +561,7 @@ static int qmp_usbc_power_on(struct phy *phy)
        unsigned int val;
        int ret;
 
-       qmp_usbc_configure(qmp->serdes, cfg->serdes_tbl, cfg->serdes_tbl_num);
+       qmp_configure(qmp->serdes, cfg->serdes_tbl, cfg->serdes_tbl_num);
 
        ret = clk_prepare_enable(qmp->pipe_clk);
        if (ret) {
@@ -618,13 +570,13 @@ static int qmp_usbc_power_on(struct phy *phy)
        }
 
        /* Tx, Rx, and PCS configurations */
-       qmp_usbc_configure_lane(qmp->tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
-       qmp_usbc_configure_lane(qmp->rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
+       qmp_configure_lane(qmp->tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
+       qmp_configure_lane(qmp->rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
 
-       qmp_usbc_configure_lane(qmp->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2);
-       qmp_usbc_configure_lane(qmp->rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2);
+       qmp_configure_lane(qmp->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2);
+       qmp_configure_lane(qmp->rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2);
 
-       qmp_usbc_configure(qmp->pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
+       qmp_configure(qmp->pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
 
        if (cfg->has_pwrdn_delay)
                usleep_range(10, 20);