platform/x86/intel/pmc: Add regmap for Tiger Lake H PCH

Tiger Lake H PCH is same as Tiger Lake LP PCH from the driver
perspective with the addition of the PSON residency counter. Add regmap
for TGP H to add PSON register offsets for Tiger Lake H PCH.

Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com>
Link: https://lore.kernel.org/r/20231219042216.2592029-3-rajvi.jingar@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index 91e5e500eb416d633fa60587189801a48ca7eae1..e95105ad12435a672a0b2b31698a595ec9ab5e9e 100644 (file)
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -1216,15 +1216,15 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = {
        X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI,        icl_core_init),
        X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE,           cnp_core_init),
        X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L,         cnp_core_init),
-       X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,         tgl_core_init),
+       X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,         tgl_l_core_init),
        X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,           tgl_core_init),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT,        tgl_core_init),
+       X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT,        tgl_l_core_init),
        X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L,      icl_core_init),
        X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,          tgl_core_init),
-       X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,         tgl_core_init),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,      tgl_core_init),
+       X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,         tgl_l_core_init),
+       X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,      tgl_l_core_init),
        X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,           adl_core_init),
-       X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,        tgl_core_init),
+       X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,        tgl_l_core_init),
        X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,          adl_core_init),
        X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,        adl_core_init),
        X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L,        mtl_core_init),

diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index 91cb34a6505cc6791a5a2a42b7a850e9f66ff1a4..d09962940ad6fc53a578de9f5c3d702316cfe5b9 100644 (file)
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -223,6 +223,10 @@ enum ppfear_regs {
 #define TGL_LPM_PRI_OFFSET                     0x1C7C
 #define TGL_LPM_NUM_MAPS                       6
 
+/* Tigerlake PSON residency register */
+#define TGL_PSON_RESIDENCY_OFFSET              0x18f8
+#define TGL_PSON_RES_COUNTER_STEP              0x7A
+
 /* Extended Test Mode Register 3 (CNL and later) */
 #define ETR3_OFFSET                            0x1048
 #define ETR3_CF9GR                             BIT(20)
@@ -507,6 +511,8 @@ int spt_core_init(struct pmc_dev *pmcdev);
 int cnp_core_init(struct pmc_dev *pmcdev);
 int icl_core_init(struct pmc_dev *pmcdev);
 int tgl_core_init(struct pmc_dev *pmcdev);
+int tgl_l_core_init(struct pmc_dev *pmcdev);
+int tgl_core_generic_init(struct pmc_dev *pmcdev, int pch_tp);
 int adl_core_init(struct pmc_dev *pmcdev);
 int mtl_core_init(struct pmc_dev *pmcdev);
 

diff --git a/drivers/platform/x86/intel/pmc/tgl.c b/drivers/platform/x86/intel/pmc/tgl.c
index d5f1d2223c5a5e2636c2ecc264d64fe5c6e35843..91fd725951e556deaf34e7333f684bf167b72cac 100644 (file)
--- a/drivers/platform/x86/intel/pmc/tgl.c
+++ b/drivers/platform/x86/intel/pmc/tgl.c
@@ -13,6 +13,11 @@
 #define ACPI_S0IX_DSM_UUID             "57a6512e-3979-4e9d-9708-ff13b2508972"
 #define ACPI_GET_LOW_MODE_REGISTERS    1
 
+enum pch_type {
+       PCH_H,
+       PCH_LP
+};
+
 const struct pmc_bit_map tgl_pfear_map[] = {
        {"PSF9",                BIT(0)},
        {"RES_66",              BIT(1)},
@@ -205,6 +210,33 @@ const struct pmc_reg_map tgl_reg_map = {
        .etr3_offset = ETR3_OFFSET,
 };
 
+const struct pmc_reg_map tgl_h_reg_map = {
+       .pfear_sts = ext_tgl_pfear_map,
+       .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
+       .slp_s0_res_counter_step = TGL_PMC_SLP_S0_RES_COUNTER_STEP,
+       .ltr_show_sts = cnp_ltr_show_map,
+       .msr_sts = msr_map,
+       .ltr_ignore_offset = CNP_PMC_LTR_IGNORE_OFFSET,
+       .regmap_length = CNP_PMC_MMIO_REG_LEN,
+       .ppfear0_offset = CNP_PMC_HOST_PPFEAR0A,
+       .ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES,
+       .pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET,
+       .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
+       .ltr_ignore_max = TGL_NUM_IP_IGN_ALLOWED,
+       .lpm_num_maps = TGL_LPM_NUM_MAPS,
+       .lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2,
+       .lpm_sts_latch_en_offset = TGL_LPM_STS_LATCH_EN_OFFSET,
+       .lpm_en_offset = TGL_LPM_EN_OFFSET,
+       .lpm_priority_offset = TGL_LPM_PRI_OFFSET,
+       .lpm_residency_offset = TGL_LPM_RESIDENCY_OFFSET,
+       .lpm_sts = tgl_lpm_maps,
+       .lpm_status_offset = TGL_LPM_STATUS_OFFSET,
+       .lpm_live_status_offset = TGL_LPM_LIVE_STATUS_OFFSET,
+       .etr3_offset = ETR3_OFFSET,
+       .pson_residency_offset = TGL_PSON_RESIDENCY_OFFSET,
+       .pson_residency_counter_step = TGL_PSON_RES_COUNTER_STEP,
+};
+
 void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev)
 {
        struct pmc_dev *pmcdev = platform_get_drvdata(pdev);
@@ -253,12 +285,26 @@ free_acpi_obj:
        ACPI_FREE(out_obj);
 }
 
+int tgl_l_core_init(struct pmc_dev *pmcdev)
+{
+       return tgl_core_generic_init(pmcdev, PCH_LP);
+}
+
 int tgl_core_init(struct pmc_dev *pmcdev)
+{
+       return tgl_core_generic_init(pmcdev, PCH_H);
+}
+
+int tgl_core_generic_init(struct pmc_dev *pmcdev, int pch_tp)
 {
        struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
        int ret;
 
-       pmc->map = &tgl_reg_map;
+       if (pch_tp == PCH_H)
+               pmc->map = &tgl_h_reg_map;
+       else
+               pmc->map = &tgl_reg_map;
+
        ret = get_primary_reg_base(pmc);
        if (ret)
                return ret;