drm/amd/pm: optimize AC timing programming

Programming AC Timing Parameters is only dependent on MCLK.
No need to nest loop for each SCLK DPM level.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
index e6099c2d3c119f73df1f503bc641367c87a3faac..0c55574bff7a9a3cd418df270642853cfd0aa4ca 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
@@ -1465,7 +1465,7 @@ static int polaris10_program_memory_timing_parameters(struct pp_hwmgr *hwmgr)
                                        hw_data->dpm_table.sclk_table.dpm_levels[i].value,
                                        hw_data->dpm_table.mclk_table.dpm_levels[j].value,
                                        &arb_regs.entries[i][j]);
-                       if (result == 0)
+                       if (result == 0 && i == 0)
                                result = atomctrl_set_ac_timing_ai(hwmgr, hw_data->dpm_table.mclk_table.dpm_levels[j].value, j);
                        if (result != 0)
                                return result;