arm64: dts: zynqmp: Wire up the DisplayPort subsystem

Enable the dpsub device and wire it up to the PS-GTR PHY lanes routed to
the DisplayPort connector.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9769d4d103b6eb75e3324825117f6832a746004e.1611232558.git.michal.simek@xilinx.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
index 71ebcaadb7c8265ca108337da9ac25b580d75bbc..a53598c3624b46761e983c17ae5287ce980c45f1 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
@@ -15,6 +15,7 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/phy/phy.h>
 
 / {
        model = "ZynqMP ZCU100 RevC";
@@ -108,6 +109,18 @@
                compatible = "iio-hwmon";
                io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
        };
+
+       si5335a_0: clk26 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <26000000>;
+       };
+
+       si5335a_1: clk27 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <27000000>;
+       };
 };
 
 &dcc {
@@ -224,6 +237,13 @@
        };
 };
 
+&psgtr {
+       status = "okay";
+       /* usb3, dps */
+       clocks = <&si5335a_0>, <&si5335a_1>;
+       clock-names = "ref0", "ref1";
+};
+
 &rtc {
        status = "okay";
 };
@@ -295,3 +315,14 @@
 &watchdog0 {
        status = "okay";
 };
+
+&zynqmp_dpdma {
+       status = "okay";
+};
+
+&zynqmp_dpsub {
+       status = "okay";
+       phy-names = "dp-phy0", "dp-phy1";
+       phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
+              <&psgtr 0 PHY_TYPE_DP 1 1>;
+};

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index 9abd10f6785a8627a05c489ffccde3793e96c7d6..12e8bd48dc8c8029ce226959bebbdd6c1cd78225 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -714,3 +714,13 @@
 &watchdog0 {
        status = "okay";
 };
+
+&zynqmp_dpdma {
+       status = "okay";
+};
+
+&zynqmp_dpsub {
+       status = "okay";
+       phy-names = "dp-phy0";
+       phys = <&psgtr 1 PHY_TYPE_DP 0 3>;
+};

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
index 8ede619fea522a0973b8a7c505fed25f31ce8188..5637e1c17fdf2cdf9ab7491b522b3b7ad4238561 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
@@ -224,3 +224,14 @@
 &watchdog0 {
        status = "okay";
 };
+
+&zynqmp_dpdma {
+       status = "okay";
+};
+
+&zynqmp_dpsub {
+       status = "okay";
+       phy-names = "dp-phy0", "dp-phy1";
+       phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
+              <&psgtr 0 PHY_TYPE_DP 1 3>;
+};

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
index 414f98f1831e741558dbd433ffaf2d15eea481fd..7f2e32831b051957e160a61a570d8d7b7583b31d 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
@@ -280,3 +280,14 @@
 &watchdog0 {
        status = "okay";
 };
+
+&zynqmp_dpdma {
+       status = "okay";
+};
+
+&zynqmp_dpsub {
+       status = "okay";
+       phy-names = "dp-phy0", "dp-phy1";
+       phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
+              <&psgtr 0 PHY_TYPE_DP 1 3>;
+};

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
index d60a3078702217d708281f173d4129e9e53b96b0..18771e868399ca32e2e94d6b9224c169d8e2b6e3 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
@@ -156,6 +156,17 @@
        status = "okay";
 };
 
+&zynqmp_dpdma {
+       status = "okay";
+};
+
+&zynqmp_dpsub {
+       status = "okay";
+       phy-names = "dp-phy0", "dp-phy1";
+       phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
+              <&psgtr 0 PHY_TYPE_DP 1 3>;
+};
+
 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
 &fpd_dma_chan1 {
        status = "okay";

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
index 758de05c4a4bd637a6c8c10c687fbc9c02a47e7b..d4b68f0d009846ba5b87cbef98ec05ea8880f95a 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -584,3 +584,14 @@
        status = "okay";
        dr_mode = "host";
 };
+
+&zynqmp_dpdma {
+       status = "okay";
+};
+
+&zynqmp_dpsub {
+       status = "okay";
+       phy-names = "dp-phy0", "dp-phy1";
+       phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
+              <&psgtr 0 PHY_TYPE_DP 1 1>;
+};