const struct pci_device_id *ent)
{
struct device *dev = &pdev->dev;
- struct spi_master *master;
+ struct spi_controller *host;
struct octeon_spi *p;
int ret;
- master = spi_alloc_master(dev, sizeof(struct octeon_spi));
- if (!master)
+ host = spi_alloc_host(dev, sizeof(struct octeon_spi));
+ if (!host)
return -ENOMEM;
- p = spi_master_get_devdata(master);
+ p = spi_controller_get_devdata(host);
ret = pcim_enable_device(pdev);
if (ret)
p->sys_freq = SYS_FREQ_DEFAULT;
dev_info(dev, "Set system clock to %u\n", p->sys_freq);
- master->flags = SPI_CONTROLLER_HALF_DUPLEX;
- master->num_chipselect = 4;
- master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH |
+ host->flags = SPI_CONTROLLER_HALF_DUPLEX;
+ host->num_chipselect = 4;
+ host->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH |
SPI_LSB_FIRST | SPI_3WIRE;
- master->transfer_one_message = octeon_spi_transfer_one_message;
- master->bits_per_word_mask = SPI_BPW_MASK(8);
- master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
- master->dev.of_node = pdev->dev.of_node;
+ host->transfer_one_message = octeon_spi_transfer_one_message;
+ host->bits_per_word_mask = SPI_BPW_MASK(8);
+ host->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
+ host->dev.of_node = pdev->dev.of_node;
- pci_set_drvdata(pdev, master);
+ pci_set_drvdata(pdev, host);
- ret = devm_spi_register_master(dev, master);
+ ret = devm_spi_register_controller(dev, host);
if (ret)
goto error;
error:
clk_disable_unprepare(p->clk);
pci_release_regions(pdev);
- spi_master_put(master);
+ spi_controller_put(host);
return ret;
}
static void thunderx_spi_remove(struct pci_dev *pdev)
{
- struct spi_master *master = pci_get_drvdata(pdev);
+ struct spi_controller *host = pci_get_drvdata(pdev);
struct octeon_spi *p;
- p = spi_master_get_devdata(master);
+ p = spi_controller_get_devdata(host);
if (!p)
return;