iio: adc: ti-ads131e08: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: d935eddd2799 ("iio: adc: Add driver for Texas Instruments ADS131E0x ADC family")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Tomislav Denis <tomislav.denis@avl.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-36-jic23@kernel.org

diff --git a/drivers/iio/adc/ti-ads131e08.c b/drivers/iio/adc/ti-ads131e08.c
index 0c2025a22575054bbb6e4503e3764a2559ffe552..0dd9a50a91386cbbacb5300220b822de65499e47 100644 (file)
--- a/drivers/iio/adc/ti-ads131e08.c
+++ b/drivers/iio/adc/ti-ads131e08.c
@@ -105,7 +105,7 @@ struct ads131e08_state {
                s64 ts __aligned(8);
        } tmp_buf;
 
-       u8 tx_buf[3] ____cacheline_aligned;
+       u8 tx_buf[3] __aligned(IIO_DMA_MINALIGN);
        /*
         * Add extra one padding byte to be able to access the last channel
         * value using u32 pointer