drm/i915/display: Skip state verification with TBT-ALT mode
authorMika Kahola <mika.kahola@intel.com>
Wed, 29 Nov 2023 12:22:21 +0000 (14:22 +0200)
committerMika Kahola <mika.kahola@intel.com>
Fri, 1 Dec 2023 10:21:46 +0000 (12:21 +0200)
With TBT-ALT mode we are not programming C20 chip PLL's and
hence we don't need to check state verification. We don't
need to program DP link signal levels i.e.pre-emphasis and
voltage swing either.

This patch fixes dmesg errors like this one

"[drm] ERROR PHY F Write 0c06 failed after 3 retries."

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231129122221.1109084-1-mika.kahola@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c

index a8fa7658080205f4a1f93b6ebe09c312d081d535..5fbec5784b8358956a3794d418dc3adfa64e35df 100644 (file)
@@ -415,9 +415,15 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,
        struct drm_i915_private *i915 = to_i915(encoder->base.dev);
        const struct intel_ddi_buf_trans *trans;
        enum phy phy = intel_port_to_phy(i915, encoder->port);
-       u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder);
+       u8 owned_lane_mask;
        intel_wakeref_t wakeref;
        int n_entries, ln;
+       struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
+       if (intel_tc_port_in_tbt_alt_mode(dig_port))
+               return;
+
+       owned_lane_mask = intel_cx0_get_owned_lane_mask(i915, encoder);
 
        wakeref = intel_cx0_phy_transaction_begin(encoder);
 
@@ -3136,6 +3142,9 @@ void intel_cx0pll_state_verify(struct intel_atomic_state *state,
        encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
        phy = intel_port_to_phy(i915, encoder->port);
 
+       if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)))
+               return;
+
        intel_cx0pll_readout_hw_state(encoder, &mpll_hw_state);
 
        if (intel_is_c10phy(i915, phy))