arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3

commit 4ce01ce36d77137cf60776b320babed89de6bd4c upstream.

There is a header for a DB9 serial port, but any attempts to use
hardware handshaking fail.  Enable RTS and CTS pin muxing and enable
handshaking in the uart node.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
index 6f5e63696ec0a1e1481dbe9d002589be4ff24755..94e5fa8ca9572119cc2f80a8ecc6923e7b88649c 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
@@ -166,6 +166,7 @@
        pinctrl-0 = <&pinctrl_uart3>;
        assigned-clocks = <&clk IMX8MM_CLK_UART3>;
        assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+       uart-has-rtscts;
        status = "okay";
 };
 
@@ -236,6 +237,8 @@
                fsl,pins = <
                        MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX   0x40
                        MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX   0x40
+                       MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B        0x40
+                       MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
                >;
        };