drm/amd/display: Always update DPPCLK_DTO when clock increase

[why]
Need to update the update_clock sequence to a fully tested sequence for
dcn30

[how]
Removed the check to see if clock is lowered

Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Oliver Logush <oliver.logush@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
index fbdd0a92d1466ab885ad3a7cfc3ebb8461e3765f..451e8d6cd8bd7f3aa52845e59f8f9acc01fe3f50 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
@@ -157,8 +157,7 @@ static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base,
                } else {
                        if (update_dppclk || update_dispclk)
                                dcn20_update_clocks_update_dentist(clk_mgr, context);
-                       if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)
-                               dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
+                       dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
                }
        }
 }

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
index bc4ddc36fe58b4bb797adfe5a459fb211e611ffd..f310b0d25a076931421048b7c0c866ef9cb96600 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
@@ -176,8 +176,7 @@ static void vg_update_clocks(struct clk_mgr *clk_mgr_base,
                if (update_dppclk || update_dispclk)
                        dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);
                // always update dtos unless clock is lowered and not safe to lower
-               if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)
-                       dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
+               dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
        }
 }