mmc: sunxi-mmc: Fix DMA descriptors allocated above 32 bits
authorSamuel Holland <samuel@sholland.org>
Sun, 24 Apr 2022 23:17:50 +0000 (18:17 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 12 May 2022 10:30:02 +0000 (12:30 +0200)
commit e9f3fb523dbf476dc86beea23f5b5ca8f9687c93 upstream.

Newer variants of the MMC controller support a 34-bit physical address
space by using word addresses instead of byte addresses. However, the
code truncates the DMA descriptor address to 32 bits before applying the
shift. This breaks DMA for descriptors allocated above the 32-bit limit.

Fixes: 3536b82e5853 ("mmc: sunxi: add support for A100 mmc controller")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220424231751.32053-1-samuel@sholland.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/mmc/host/sunxi-mmc.c

index 2702736a1c57defedc83072884bf782a9c1afa95..ce6cb8be654ef2c11d03d7fdae0a9d899313a5b6 100644 (file)
@@ -377,8 +377,9 @@ static void sunxi_mmc_init_idma_des(struct sunxi_mmc_host *host,
                pdes[i].buf_addr_ptr1 =
                        cpu_to_le32(sg_dma_address(&data->sg[i]) >>
                                    host->cfg->idma_des_shift);
-               pdes[i].buf_addr_ptr2 = cpu_to_le32((u32)next_desc >>
-                                                   host->cfg->idma_des_shift);
+               pdes[i].buf_addr_ptr2 =
+                       cpu_to_le32(next_desc >>
+                                   host->cfg->idma_des_shift);
        }
 
        pdes[0].config |= cpu_to_le32(SDXC_IDMAC_DES0_FD);