.fixed_mem_region = true,
                .static_window_map = false,
                .hybrid_bus_type = false,
+               .dp_window_idx = 0,
+               .ce_window_idx = 0,
        },
        {
                .hw_rev = ATH11K_HW_IPQ6018_HW10,
                .fixed_mem_region = true,
                .static_window_map = false,
                .hybrid_bus_type = false,
+               .dp_window_idx = 0,
+               .ce_window_idx = 0,
        },
        {
                .name = "qca6390 hw2.0",
                .fixed_mem_region = false,
                .static_window_map = false,
                .hybrid_bus_type = false,
+               .dp_window_idx = 0,
+               .ce_window_idx = 0,
        },
        {
                .name = "qcn9074 hw1.0",
                .fixed_mem_region = false,
                .static_window_map = true,
                .hybrid_bus_type = false,
+               .dp_window_idx = 3,
+               .ce_window_idx = 2,
        },
        {
                .name = "wcn6855 hw2.0",
                .fixed_mem_region = false,
                .static_window_map = false,
                .hybrid_bus_type = false,
+               .dp_window_idx = 0,
+               .ce_window_idx = 0,
        },
        {
                .name = "wcn6855 hw2.1",
                .fixed_mem_region = false,
                .static_window_map = false,
                .hybrid_bus_type = false,
+               .dp_window_idx = 0,
+               .ce_window_idx = 0,
        },
        {
                .name = "wcn6750 hw1.0",
                .fixed_mem_region = false,
                .static_window_map = true,
                .hybrid_bus_type = true,
+               .dp_window_idx = 1,
+               .ce_window_idx = 2,
        },
 };
 
 
 static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
                                               u32 offset)
 {
-       u32 window_start;
+       u32 window_start = 0;
 
-       /* If offset lies within DP register range, use 3rd window */
        if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
-               window_start = 3 * ATH11K_PCI_WINDOW_START;
-       /* If offset lies within CE register range, use 2nd window */
-       else if ((offset ^ HAL_CE_WFSS_CE_REG_BASE) < ATH11K_PCI_WINDOW_RANGE_MASK)
-               window_start = 2 * ATH11K_PCI_WINDOW_START;
-       else
-               window_start = ATH11K_PCI_WINDOW_START;
+               window_start = ab->hw_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
+       else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) <
+                ATH11K_PCI_WINDOW_RANGE_MASK)
+               window_start = ab->hw_params.ce_window_idx * ATH11K_PCI_WINDOW_START;
 
        return window_start;
 }
 
        if (offset < ATH11K_PCI_WINDOW_START) {
                iowrite32(value, ab->mem  + offset);
-       } else {
-               if (ab->hw_params.static_window_map)
-                       window_start = ath11k_pcic_get_window_start(ab, offset);
-               else
-                       window_start = ATH11K_PCI_WINDOW_START;
-
-               if (window_start == ATH11K_PCI_WINDOW_START &&
-                   ab->pci.ops->window_write32) {
-                       ab->pci.ops->window_write32(ab, offset, value);
-               } else {
-                       iowrite32(value, ab->mem + window_start +
-                                 (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
-               }
+       } else if (ab->hw_params.static_window_map) {
+               window_start = ath11k_pcic_get_window_start(ab, offset);
+               iowrite32(value, ab->mem + window_start +
+                         (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+       } else if (ab->pci.ops->window_write32) {
+               ab->pci.ops->window_write32(ab, offset, value);
        }
 
        if (test_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags) &&
 
 u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
 {
-       u32 val, window_start;
+       u32 val = 0;
+       u32 window_start;
        int ret = 0;
 
        /* for offset beyond BAR + 4K - 32, may
 
        if (offset < ATH11K_PCI_WINDOW_START) {
                val = ioread32(ab->mem + offset);
-       } else {
-               if (ab->hw_params.static_window_map)
-                       window_start = ath11k_pcic_get_window_start(ab, offset);
-               else
-                       window_start = ATH11K_PCI_WINDOW_START;
-
-               if (window_start == ATH11K_PCI_WINDOW_START &&
-                   ab->pci.ops->window_read32) {
-                       val = ab->pci.ops->window_read32(ab, offset);
-               } else {
-                       val = ioread32(ab->mem + window_start +
-                                      (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
-               }
+       } else if (ab->hw_params.static_window_map) {
+               window_start = ath11k_pcic_get_window_start(ab, offset);
+               val = ioread32(ab->mem + window_start +
+                              (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+       } else if (ab->pci.ops->window_read32) {
+               val = ab->pci.ops->window_read32(ab, offset);
        }
 
        if (test_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags) &&