drm/i915/dmabuf: drop the flush on discrete

We were overzealous here; even though discrete is non-LLC, it should
still be always coherent.

v2(Thomas & Daniel)
  - Be extra cautious and limit to DG1
  - Add some more commentary

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211029122137.3484203-1-matthew.auld@intel.com

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index a45d0ec2c5b69d68db91b1b9c2778a9069d682b5..a2b485a1be8c73d15d9114c63d5ca78d55f6dbe7 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -250,8 +250,19 @@ static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
        if (IS_ERR(pages))
                return PTR_ERR(pages);
 
-       /* XXX: consider doing a vmap flush or something */
-       if (!HAS_LLC(i915) || i915_gem_object_can_bypass_llc(obj))
+       /*
+        * DG1 is special here since it still snoops transactions even with
+        * CACHE_NONE. This is not the case with other HAS_SNOOP platforms. We
+        * might need to revisit this as we add new discrete platforms.
+        *
+        * XXX: Consider doing a vmap flush or something, where possible.
+        * Currently we just do a heavy handed wbinvd_on_all_cpus() here since
+        * the underlying sg_table might not even point to struct pages, so we
+        * can't just call drm_clflush_sg or similar, like we do elsewhere in
+        * the driver.
+        */
+       if (i915_gem_object_can_bypass_llc(obj) ||
+           (!HAS_LLC(i915) && !IS_DG1(i915)))
                wbinvd_on_all_cpus();
 
        sg_page_sizes = i915_sg_dma_sizes(pages->sgl);