arm64: dts: exynos: add minimal support for exynosautov920 sadk board
authorJaewon Kim <jaewon02.kim@samsung.com>
Fri, 8 Dec 2023 07:45:25 +0000 (16:45 +0900)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 11 Dec 2023 07:40:46 +0000 (08:40 +0100)
ExynosAutov920 SADK is ExynosAutov920 SoC based SADK(Samsung Automotive
Development Kit) board. It has 16GB(8GB + 8GB) LPDDR5 RAM and 256GB
(128GB + 128GB) UFS.

This is minimal support board device-tree.
 * Serial console
 * GPIO Key
 * PWM FAN

Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Link: https://lore.kernel.org/r/20231208074527.50840-3-jaewon02.kim@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/exynos/Makefile
arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts [new file with mode: 0644]

index 6e4ba69268e50eee823f2d1e781b9270e08e6af8..da06e1a9456cef5175cc5965b4b8f63247c39a67 100644 (file)
@@ -5,4 +5,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \
        exynos7-espresso.dtb            \
        exynos7885-jackpotlte.dtb       \
        exynos850-e850-96.dtb           \
-       exynosautov9-sadk.dtb
+       exynosautov9-sadk.dtb           \
+       exynosautov920-sadk.dtb
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts
new file mode 100644 (file)
index 0000000..a397f06
--- /dev/null
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's ExynosAutov920 SADK board device tree source
+ *
+ * Copyright (c) 2023 Samsung Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+#include "exynosautov920.dtsi"
+#include "exynos-pinctrl.h"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Samsung ExynosAutov920 SADK board";
+       compatible = "samsung,exynosautov920-sadk", "samsung,exynosautov920";
+
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       aliases {
+               serial0 = &serial_0;
+       };
+
+       chosen {
+               stdout-path = &serial_0;
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               pinctrl-names = "default";
+               pinctrl-0 = <&key_wakeup &key_back>;
+
+               key-wakeup {
+                       label = "KEY_WAKEUP";
+                       linux,code = <KEY_WAKEUP>;
+                       gpios = <&gpa0 0 GPIO_ACTIVE_LOW>;
+                       wakeup-source;
+               };
+
+               key-back {
+                       label = "KEY_BACK";
+                       linux,code = <KEY_BACK>;
+                       gpios = <&gpp6 3 GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x0 0x80000000 0x0 0x70000000>,
+                     <0x8 0x80000000 0x1 0xfba00000>,
+                     <0xa 0x00000000 0x2 0x00000000>;
+       };
+};
+
+&pinctrl_alive {
+       key_wakeup: key-wakeup-pins {
+               samsung,pins = "gpa0-0";
+               samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
+       };
+};
+
+&pinctrl_peric1 {
+       key_back: key-back-pins {
+               samsung,pins = "gpp6-3";
+               samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
+       };
+};
+
+&pwm {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pwm_tout0>;
+       status = "okay";
+};
+
+&serial_0 {
+       status = "okay";
+};
+
+&usi_0 {
+       samsung,clkreq-on; /* needed for UART mode */
+       status = "okay";
+};
+
+&xtcxo {
+       clock-frequency = <38400000>;
+};