arm64: dts: ti: k3-am65-main: Add ehrpwm nodes
authorVignesh Raghavendra <vigneshr@ti.com>
Sun, 22 Mar 2020 11:26:30 +0000 (16:56 +0530)
committerTero Kristo <t-kristo@ti.com>
Mon, 27 Apr 2020 10:26:35 +0000 (13:26 +0300)
Add DT nodes for all ehrpwm instances present on AM654 EVM.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
arch/arm64/boot/dts/ti/k3-am65-main.dtsi

index 7d1bc991708ef2a0e357393c46b3d9e0198f9f3e..dfc06ecdb47bbcae008b8cb468d18ec49bcefba0 100644 (file)
                        compatible = "syscon";
                        reg = <0x0000041E0 0x14>;
                };
+
+               ehrpwm_tbclk: syscon@4140 {
+                       compatible = "ti,am654-ehrpwm-tbclk", "syscon";
+                       reg = <0x4140 0x18>;
+                       #clock-cells = <1>;
+               };
        };
 
        dwc3_0: dwc3@4000000 {
                        #size-cells = <0>;
                };
        };
+
+       ehrpwm0: pwm@3000000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               #pwm-cells = <3>;
+               reg = <0x0 0x3000000 0x0 0x100>;
+               power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&ehrpwm_tbclk 0>, <&k3_clks 40 0>;
+               clock-names = "tbclk", "fck";
+       };
+
+       ehrpwm1: pwm@3010000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               #pwm-cells = <3>;
+               reg = <0x0 0x3010000 0x0 0x100>;
+               power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&ehrpwm_tbclk 1>, <&k3_clks 41 0>;
+               clock-names = "tbclk", "fck";
+       };
+
+       ehrpwm2: pwm@3020000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               #pwm-cells = <3>;
+               reg = <0x0 0x3020000 0x0 0x100>;
+               power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&ehrpwm_tbclk 2>, <&k3_clks 42 0>;
+               clock-names = "tbclk", "fck";
+       };
+
+       ehrpwm3: pwm@3030000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               #pwm-cells = <3>;
+               reg = <0x0 0x3030000 0x0 0x100>;
+               power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&ehrpwm_tbclk 3>, <&k3_clks 43 0>;
+               clock-names = "tbclk", "fck";
+       };
+
+       ehrpwm4: pwm@3040000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               #pwm-cells = <3>;
+               reg = <0x0 0x3040000 0x0 0x100>;
+               power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&ehrpwm_tbclk 4>, <&k3_clks 44 0>;
+               clock-names = "tbclk", "fck";
+       };
+
+       ehrpwm5: pwm@3050000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               #pwm-cells = <3>;
+               reg = <0x0 0x3050000 0x0 0x100>;
+               power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&ehrpwm_tbclk 5>, <&k3_clks 45 0>;
+               clock-names = "tbclk", "fck";
+       };
 };