ARM: dts: rockchip: fix rk3288 hdmi ports node

Fix rk3288 hdmi ports node so that it matches the
rockchip,dw-hdmi.yaml binding with some reordering
to align with the (new) documentation about
property ordering.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/cc3a9b4f-076d-4660-b464-615003b6a066@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index ead343dc3df101a4ab98c4383f6302f600195597..3f1d640afafaed7e79e15d38910c86129eff7eae 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
@@ -1240,27 +1240,37 @@
                compatible = "rockchip,rk3288-dw-hdmi";
                reg = <0x0 0xff980000 0x0 0x20000>;
                reg-io-width = <4>;
-               #sound-dai-cells = <0>;
-               rockchip,grf = <&grf>;
                interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru  PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
                clock-names = "iahb", "isfr", "cec";
                power-domains = <&power RK3288_PD_VIO>;
+               rockchip,grf = <&grf>;
+               #sound-dai-cells = <0>;
                status = "disabled";
 
                ports {
-                       hdmi_in: port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       hdmi_in: port@0 {
+                               reg = <0>;
                                #address-cells = <1>;
                                #size-cells = <0>;
+
                                hdmi_in_vopb: endpoint@0 {
                                        reg = <0>;
                                        remote-endpoint = <&vopb_out_hdmi>;
                                };
+
                                hdmi_in_vopl: endpoint@1 {
                                        reg = <1>;
                                        remote-endpoint = <&vopl_out_hdmi>;
                                };
                        };
+
+                       hdmi_out: port@1 {
+                               reg = <1>;
+                       };
                };
        };