dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros

Add power domain indices for RZ/G1H (R8A7742) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1587678050-23468-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/include/dt-bindings/power/r8a7742-sysc.h b/include/dt-bindings/power/r8a7742-sysc.h
new file mode 100644 (file)
index 0000000..1b1bd3c
--- /dev/null
+++ b/include/dt-bindings/power/r8a7742-sysc.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A7742_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A7742_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A7742_PD_CA15_CPU0            0
+#define R8A7742_PD_CA15_CPU1            1
+#define R8A7742_PD_CA15_CPU2            2
+#define R8A7742_PD_CA15_CPU3            3
+#define R8A7742_PD_CA7_CPU0             5
+#define R8A7742_PD_CA7_CPU1             6
+#define R8A7742_PD_CA7_CPU2             7
+#define R8A7742_PD_CA7_CPU3             8
+#define R8A7742_PD_CA15_SCU            12
+#define R8A7742_PD_RGX                 20
+#define R8A7742_PD_CA7_SCU             21
+
+/* Always-on power area */
+#define R8A7742_PD_ALWAYS_ON           32
+
+#endif /* __DT_BINDINGS_POWER_R8A7742_SYSC_H__ */