arm64: dts: imx8-ss-img: Assign slot for imx jpeg encoder/decoder

assign a single slot,
configure interrupt and power domain only for 1 slot,
not for the all 4 slots.

Signed-off-by: Ming Qian <ming.qian@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
index a90654155a88b7cfcf55176ea7d494e6bc4d15e7..176dcce24b64996ed1f3a3b3ad550f20af9bb9df 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
@@ -18,10 +18,7 @@ img_subsys: bus@58000000 {
 
        jpegdec: jpegdec@58400000 {
                reg = <0x58400000 0x00050000>;
-               interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
                         <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
                clock-names = "per", "ipg";
@@ -29,18 +26,13 @@ img_subsys: bus@58000000 {
                                  <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
                assigned-clock-rates = <200000000>, <200000000>;
                power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
-                               <&pd IMX_SC_R_MJPEG_DEC_S0>,
-                               <&pd IMX_SC_R_MJPEG_DEC_S1>,
-                               <&pd IMX_SC_R_MJPEG_DEC_S2>,
-                               <&pd IMX_SC_R_MJPEG_DEC_S3>;
+                               <&pd IMX_SC_R_MJPEG_DEC_S0>;
+               slot = <0>;
        };
 
        jpegenc: jpegenc@58450000 {
                reg = <0x58450000 0x00050000>;
-               interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
-                            <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
                         <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
                clock-names = "per", "ipg";
@@ -48,10 +40,8 @@ img_subsys: bus@58000000 {
                                  <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
                assigned-clock-rates = <200000000>, <200000000>;
                power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
-                               <&pd IMX_SC_R_MJPEG_ENC_S0>,
-                               <&pd IMX_SC_R_MJPEG_ENC_S1>,
-                               <&pd IMX_SC_R_MJPEG_ENC_S2>,
-                               <&pd IMX_SC_R_MJPEG_ENC_S3>;
+                               <&pd IMX_SC_R_MJPEG_ENC_S0>;
+               slot = <0>;
        };
 
        img_jpeg_dec_lpcg: clock-controller@585d0000 {