ARM: dts: imx7ulp: Move usdhc clocks assignment to board DT

usdhc's clock rate is different according to different devices
connected, so clock rate assignment should be placed in board
DT according to different devices connected on each usdhc port.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts b/arch/arm/boot/dts/imx7ulp-evk.dts
index 4245b33bb451851d86fb8bd29ee9f40650d73b40..f1093d2062edcb009f1f6cef3f7c5681d0f0c146 100644 (file)
--- a/arch/arm/boot/dts/imx7ulp-evk.dts
+++ b/arch/arm/boot/dts/imx7ulp-evk.dts
@@ -77,6 +77,8 @@
 };
 
 &usdhc0 {
+       assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
+       assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usdhc0>;
        cd-gpios = <&gpio_ptc 10 GPIO_ACTIVE_LOW>;

diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index 25e6f09c2ddd67ce87f2991e4d818b0c6ba74a6c..d37a1927c88ea3fae91f4d1e67407f5d39036f9f 100644 (file)
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -223,8 +223,6 @@
                                 <&scg1 IMX7ULP_CLK_NIC1_DIV>,
                                 <&pcc2 IMX7ULP_CLK_USDHC0>;
                        clock-names = "ipg", "ahb", "per";
-                       assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
-                       assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
                        bus-width = <4>;
                        fsl,tuning-start-tap = <20>;
                        fsl,tuning-step = <2>;
@@ -239,8 +237,6 @@
                                 <&scg1 IMX7ULP_CLK_NIC1_DIV>,
                                 <&pcc2 IMX7ULP_CLK_USDHC1>;
                        clock-names = "ipg", "ahb", "per";
-                       assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC1>;
-                       assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
                        bus-width = <4>;
                        fsl,tuning-start-tap = <20>;
                        fsl,tuning-step = <2>;