e1000e: Add support for Alder Lake
authorSasha Neftin <sasha.neftin@intel.com>
Sun, 19 Jan 2020 11:57:13 +0000 (13:57 +0200)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Thu, 20 Feb 2020 00:51:12 +0000 (16:51 -0800)
Add devices ID's for the next LOM generations that will be
available on the next Intel Client platform (Alder Lake)
This patch provides the initial support for these devices

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/e1000e/ethtool.c
drivers/net/ethernet/intel/e1000e/hw.h
drivers/net/ethernet/intel/e1000e/ich8lan.c
drivers/net/ethernet/intel/e1000e/netdev.c
drivers/net/ethernet/intel/e1000e/ptp.c

index adce7e319b9eac793c155a9130bed3d4f91690fa..9e7881db7859cdf649dddbd12fd95ed57d58d5c2 100644 (file)
@@ -897,6 +897,7 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
        case e1000_pch_cnp:
                /* fall through */
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                mask |= BIT(18);
                break;
        default:
@@ -1561,6 +1562,7 @@ static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
        case e1000_pch_spt:
        case e1000_pch_cnp:
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                fext_nvm11 = er32(FEXTNVM11);
                fext_nvm11 &= ~E1000_FEXTNVM11_DISABLE_MULR_FIX;
                ew32(FEXTNVM11, fext_nvm11);
index f556163481cba00ee3ef349e9689b137cac3dd2d..b89862129a75ef21bac1b43e3d4c3ed75ab3e63d 100644 (file)
@@ -97,6 +97,10 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_TGP_I219_LM14         0x15F9
 #define E1000_DEV_ID_PCH_TGP_I219_V14          0x15FA
 #define E1000_DEV_ID_PCH_TGP_I219_LM15         0x15F4
+#define E1000_DEV_ID_PCH_ADP_I219_LM16         0x1A1E
+#define E1000_DEV_ID_PCH_ADP_I219_V16          0x1A1F
+#define E1000_DEV_ID_PCH_ADP_I219_LM17         0x1A1C
+#define E1000_DEV_ID_PCH_ADP_I219_V17          0x1A1D
 
 #define E1000_REVISION_4       4
 
@@ -121,6 +125,7 @@ enum e1000_mac_type {
        e1000_pch_spt,
        e1000_pch_cnp,
        e1000_pch_tgp,
+       e1000_pch_adp,
 };
 
 enum e1000_media_type {
index b4135c50e905224e6449e14cb00abceeef485602..735bf25952fc7d91e23cc81cede03e99477e9f65 100644 (file)
@@ -317,6 +317,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
        case e1000_pch_spt:
        case e1000_pch_cnp:
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                if (e1000_phy_is_accessible_pchlan(hw))
                        break;
 
@@ -460,6 +461,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
                case e1000_pch_spt:
                case e1000_pch_cnp:
                case e1000_pch_tgp:
+               case e1000_pch_adp:
                        /* In case the PHY needs to be in mdio slow mode,
                         * set slow mode and try to get the PHY id again.
                         */
@@ -703,6 +705,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
        case e1000_pch_spt:
        case e1000_pch_cnp:
        case e1000_pch_tgp:
+       case e1000_pch_adp:
        case e1000_pchlan:
                /* check management mode */
                mac->ops.check_mng_mode = e1000_check_mng_mode_pchlan;
@@ -1642,6 +1645,7 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter)
        case e1000_pch_spt:
        case e1000_pch_cnp:
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                rc = e1000_init_phy_params_pchlan(hw);
                break;
        default:
@@ -2095,6 +2099,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
        case e1000_pch_spt:
        case e1000_pch_cnp:
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
                break;
        default:
@@ -3133,6 +3138,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
        case e1000_pch_spt:
        case e1000_pch_cnp:
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                bank1_offset = nvm->flash_bank_size;
                act_offset = E1000_ICH_NVM_SIG_WORD;
 
@@ -4077,6 +4083,7 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
        case e1000_pch_spt:
        case e1000_pch_cnp:
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                word = NVM_COMPAT;
                valid_csum_mask = NVM_COMPAT_VALID_CSUM;
                break;
index 618c218978fe05846f5df1711619e3f842fecf19..62236543e92d3bc8da2e2ebdf8099c021e7c5e52 100644 (file)
@@ -3536,6 +3536,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
                break;
        case e1000_pch_cnp:
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
                        /* Stable 24MHz frequency */
                        incperiod = INCPERIOD_24MHZ;
@@ -4049,6 +4050,7 @@ void e1000e_reset(struct e1000_adapter *adapter)
        case e1000_pch_cnp:
                /* fall-through */
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                fc->refresh_time = 0xFFFF;
                fc->pause_time = 0xFFFF;
 
@@ -7760,6 +7762,10 @@ static const struct pci_device_id e1000_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM14), board_pch_cnp },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_cnp },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_cnp },
 
        { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
 };
index eaa5a0fb99f06b6569364fe88b36a474149c84aa..439fda2f5368f21c58fced2daf5ae0e618f2ed5e 100644 (file)
@@ -297,6 +297,7 @@ void e1000e_ptp_init(struct e1000_adapter *adapter)
        case e1000_pch_cnp:
                /* fall-through */
        case e1000_pch_tgp:
+       case e1000_pch_adp:
                if ((hw->mac.type < e1000_pch_lpt) ||
                    (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
                        adapter->ptp_clock_info.max_adj = 24000000 - 1;