drm/i915/dsi/xelpd: Disable DC states in Video mode

MIPI DSI transcoder cannot be in video mode to support any of the
display C states.

Bspec: 49195 (For DC*co DSI transcoders cannot be in video mode)
Bspec: 49193 (Hardware does not support DC5 or DC6 with MIPI DSI enabled)
Bspec: 49188 (desc of DSI_DCSTATE_CTL talks about cmd mode PM control

v2: Align to the power domain ordering (Jani)
    Add bspec references (Imre)

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211019151435.20477-4-vandita.kulkarni@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index a31974aa37ceca8c939f757b0c3baf31634060e6..d30639a59ea5ea48e522aa7f63d543305eed6d74 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -3111,6 +3111,7 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
        BIT_ULL(POWER_DOMAIN_MODESET) |                 \
        BIT_ULL(POWER_DOMAIN_AUX_A) |                   \
        BIT_ULL(POWER_DOMAIN_AUX_B) |                   \
+       BIT_ULL(POWER_DOMAIN_PORT_DSI) |                \
        BIT_ULL(POWER_DOMAIN_INIT))
 
 #define XELPD_AUX_IO_D_XELPD_POWER_DOMAINS     BIT_ULL(POWER_DOMAIN_AUX_D_XELPD)