drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status

Modify the helper to add a fixed delay or poll with timeout
based on platform specification to check for either Idle bit
set (DDI_BUF_CTL is idle for disable case)

v2:
* Use 2 separate functions or idle and active (Ville)
v3:
* Change the timeout to 16usecs (Ville)
v4:
* Change the timeout 8, follow spec (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200701221052.8946-1-manasi.d.navare@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 583170e738810147e12a91ff7aa9323940eafe4a..2120d6da3fcc5cd3e598194fa53a55835c27db8d 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1184,16 +1184,15 @@ static void intel_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
 static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
                                    enum port port)
 {
-       i915_reg_t reg = DDI_BUF_CTL(port);
-       int i;
-
-       for (i = 0; i < 16; i++) {
-               udelay(1);
-               if (intel_de_read(dev_priv, reg) & DDI_BUF_IS_IDLE)
-                       return;
+       if (IS_BROXTON(dev_priv)) {
+               udelay(16);
+               return;
        }
-       drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c idle bit\n",
-               port_name(port));
+
+       if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
+                        DDI_BUF_IS_IDLE), 8))
+               drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get idle\n",
+                       port_name(port));
 }
 
 static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)