cpu: Introduce CPUNegativeOffsetState
authorRichard Henderson <richard.henderson@linaro.org>
Sat, 23 Mar 2019 00:16:06 +0000 (17:16 -0700)
committerRichard Henderson <richard.henderson@linaro.org>
Mon, 10 Jun 2019 14:03:42 +0000 (07:03 -0700)
Nothing in there so far, but all of the plumbing done
within the target ArchCPU state.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
23 files changed:
include/exec/cpu-all.h
include/exec/cpu-defs.h
target/alpha/cpu.h
target/arm/cpu.h
target/cris/cpu.h
target/hppa/cpu.h
target/i386/cpu.h
target/lm32/cpu.h
target/m68k/cpu.h
target/microblaze/cpu.h
target/mips/cpu.h
target/moxie/cpu.h
target/nios2/cpu.h
target/openrisc/cpu.h
target/ppc/cpu.h
target/riscv/cpu.h
target/s390x/cpu.h
target/sh4/cpu.h
target/sparc/cpu.h
target/tilegx/cpu.h
target/tricore/cpu.h
target/unicore32/cpu.h
target/xtensa/cpu.h

index 71154070a78506d672eb9eb0bb2a3272d45fe2be..5ae83405c8b983f13299a739074620b76d18aa01 100644 (file)
@@ -404,4 +404,28 @@ static inline CPUState *env_cpu(CPUArchState *env)
     return &env_archcpu(env)->parent_obj;
 }
 
+/**
+ * env_neg(env)
+ * @env: The architecture environment
+ *
+ * Return the CPUNegativeOffsetState associated with the environment.
+ */
+static inline CPUNegativeOffsetState *env_neg(CPUArchState *env)
+{
+    ArchCPU *arch_cpu = container_of(env, ArchCPU, env);
+    return &arch_cpu->neg;
+}
+
+/**
+ * cpu_neg(cpu)
+ * @cpu: The generic CPUState
+ *
+ * Return the CPUNegativeOffsetState associated with the cpu.
+ */
+static inline CPUNegativeOffsetState *cpu_neg(CPUState *cpu)
+{
+    ArchCPU *arch_cpu = container_of(cpu, ArchCPU, parent_obj);
+    return &arch_cpu->neg;
+}
+
 #endif /* CPU_ALL_H */
index b9ec261b01b2f5792e8e605dd9e2465b7764213d..921fbb4c3652516c02d0d50bdf3448b9f4251546 100644 (file)
@@ -227,4 +227,12 @@ typedef struct CPUTLB {
 
 #endif  /* !CONFIG_USER_ONLY && CONFIG_TCG */
 
+/*
+ * This structure must be placed in ArchCPU immedately
+ * before CPUArchState, as a field named "neg".
+ */
+typedef struct CPUNegativeOffsetState {
+    /* Empty */
+} CPUNegativeOffsetState;
+
 #endif
index 361f85c9762462fdaa7fb6de59cb19df0e72e841..94fbc00a3bc3e1a57efceef5116c38d8bd755698 100644 (file)
@@ -272,6 +272,7 @@ struct AlphaCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUAlphaState env;
 
     /* This alarm doesn't exist in real hardware; we wish it did.  */
index abe6fce7ab9feeeb3b39be6dd15fdaa0933277d1..5965c52f0c3268843df58f3e8b31af8b9e40222a 100644 (file)
@@ -721,6 +721,7 @@ struct ARMCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUARMState env;
 
     /* Coprocessor information */
index 83c350377ac350ce747577605697615f4fa9aae7..ad93d1a9ee4752df0c37c68e7f20eee62b479c52 100644 (file)
@@ -180,6 +180,7 @@ struct CRISCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUCRISState env;
 };
 
index 7f9f54731b39db89ac44b23d53cb095d87e0b289..f7c6205218755ffc4da6ee17aacb2a36fe40c27b 100644 (file)
@@ -218,6 +218,7 @@ struct HPPACPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUHPPAState env;
     QEMUTimer *alarm_timer;
 };
index 3a155c12d3a50a3dfb3d1cdfde4bd05cd92c32c9..e7580a86e5d28d958aa08acfcd76094fb367c602 100644 (file)
@@ -1369,6 +1369,7 @@ struct X86CPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUX86State env;
 
     bool hyperv_vapic;
index 2c934472d6ad41adb382fc1929762919767aadac..324bc90f81f43731130f5ac0bb6798a2b25385af 100644 (file)
@@ -186,6 +186,7 @@ struct LM32CPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPULM32State env;
 
     uint32_t revision;
index 4006663494513f288ba7863e2783149c20e468c8..d92263b7506204a94e45b7e51106061920ee4066 100644 (file)
@@ -160,6 +160,7 @@ struct M68kCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUM68KState env;
 };
 
index a17c12ca2f3f1fcd9a55558cb277e776962ced5b..d90c4fbcb50b57fd449c721dbcce7fd04dc5c83e 100644 (file)
@@ -287,6 +287,9 @@ struct MicroBlazeCPU {
 
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
+    CPUMBState env;
+
     /* Microblaze Configuration Settings */
     struct {
         bool stackprot;
@@ -306,8 +309,6 @@ struct MicroBlazeCPU {
         char *version;
         uint8_t pvr;
     } cfg;
-
-    CPUMBState env;
 };
 
 
index 24fe25f61c5df16e021b1e6c607765a5dd785f8b..62af24937d5ed94d39658a0136a7caaa84664d5e 100644 (file)
@@ -1068,6 +1068,7 @@ struct MIPSCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUMIPSState env;
 };
 
index 3d418c8f1dc1e8d85ca91f478f33e2366c4d7869..c6b681531d00327d6042d3c4ada59030eb4e25b7 100644 (file)
@@ -87,6 +87,7 @@ typedef struct MoxieCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUMoxieState env;
 } MoxieCPU;
 
index c96d797ddac1baaa2ce7a37fb0e6f36d6f3bc720..8cc3d4971e5ed84245d0e6bace50261bb83115fc 100644 (file)
@@ -182,7 +182,9 @@ typedef struct Nios2CPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUNios2State env;
+
     bool mmu_present;
     uint32_t pid_num_bits;
     uint32_t tlb_num_ways;
index 39e2765aa28cb7b1d33153bca02cb23f0ed0fb24..51723e9312e6f96e12909296ea60eb9322c3af55 100644 (file)
@@ -313,8 +313,8 @@ typedef struct OpenRISCCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUOpenRISCState env;
-
 } OpenRISCCPU;
 
 
index 73b92c189c2eccd6366afb4c6e8716aec8cf0329..e8962e4655f5a11927cb3aae072bab16d98fd661 100644 (file)
@@ -1184,7 +1184,9 @@ struct PowerPCCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUPPCState env;
+
     int vcpu_id;
     uint32_t compat_pvr;
     PPCVirtualHypervisor *vhyp;
index d9611eaceda39716476cc14547de5c401e068189..0ed7031915201601614a8cb563ba4aeac2fc450f 100644 (file)
@@ -210,6 +210,7 @@ typedef struct RISCVCPU {
     /*< private >*/
     CPUState parent_obj;
     /*< public >*/
+    CPUNegativeOffsetState neg;
     CPURISCVState env;
 
     /* Configuration Settings */
index dbf13c922184c15519698f08dc92889225fbf4ed..21688b7c8ce2a633ec5258ab5bdecd3e4b434630 100644 (file)
@@ -156,6 +156,7 @@ struct S390CPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUS390XState env;
     S390CPUModel *model;
     /* needed for live migration */
index 610a8db6de93775639fd2a599e8eb7e52ee1dde9..e266db411f7f6c17130e737e64dfe40e1217fd14 100644 (file)
@@ -204,6 +204,7 @@ struct SuperHCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUSH4State env;
 };
 
index 0cc36873cec23ef180ce696b0163690f540346fe..a3c4f47d40ca9eb8e902b36e78cba0635b850c6f 100644 (file)
@@ -529,6 +529,7 @@ struct SPARCCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUSPARCState env;
 };
 
index 643b7dbd17f67b590f93a3653d68d96875e30e94..deb3e836ea41dda7b1095defcb2714bf9b2afbcc 100644 (file)
@@ -135,6 +135,7 @@ typedef struct TileGXCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUTLGState env;
 } TileGXCPU;
 
index 9f45bb5c24d92490a5d509a1c21d2fea62bd8be7..03b293c1f69dc398cd52c0a3b0aafaeb70c6018b 100644 (file)
@@ -205,6 +205,7 @@ struct TriCoreCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUTriCoreState env;
 };
 
index c1130e9548c11a7ce0029d38a6dc1f6d71c44204..39beb3236688e0af9790a309308fead06c029475 100644 (file)
@@ -73,6 +73,7 @@ struct UniCore32CPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUUniCore32State env;
 };
 
index e89605747acfa225b21a59d845c9c5222f17ee35..e2d7e8371d3d5d245e78d84397b2dfc340c6edc8 100644 (file)
@@ -556,6 +556,7 @@ struct XtensaCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUXtensaState env;
 };