arm64: dts: imx8m: Document the fuse address calculation

The mapping from OCOTP reg DT property to Fusemap Descriptions Table in
the datasheet is often unclear. Add a comment to make it easier to find
out how it works. No functional change.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index b45852e8087a9b1aa0f7c5afb524dbd6ba295b22..520253670c8f8a5d0a151658f68883f38c89d8c4 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -563,15 +563,28 @@
                                #address-cells = <1>;
                                #size-cells = <1>;
 
-                               imx8mm_uid: unique-id@4 {
+                               /*
+                                * The register address below maps to the MX8M
+                                * Fusemap Description Table entries this way.
+                                * Assuming
+                                *   reg = <ADDR SIZE>;
+                                * then
+                                *   Fuse Address = (ADDR * 4) + 0x400
+                                * Note that if SIZE is greater than 4, then
+                                * each subsequent fuse is located at offset
+                                * +0x10 in Fusemap Description Table (e.g.
+                                * reg = <0x4 0x8> describes fuses 0x410 and
+                                * 0x420).
+                                */
+                               imx8mm_uid: unique-id@4 { /* 0x410-0x420 */
                                        reg = <0x4 0x8>;
                                };
 
-                               cpu_speed_grade: speed-grade@10 {
+                               cpu_speed_grade: speed-grade@10 { /* 0x440 */
                                        reg = <0x10 4>;
                                };
 
-                               fec_mac_address: mac-address@90 {
+                               fec_mac_address: mac-address@90 { /* 0x640 */
                                        reg = <0x90 6>;
                                };
                        };

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 7601a031f85a0472ba3f9115d7862eb6c762eacc..5f7852620fdf48ffa64c6661d44da985e1c72c1e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -564,15 +564,28 @@
                                #address-cells = <1>;
                                #size-cells = <1>;
 
-                               imx8mn_uid: unique-id@4 {
+                               /*
+                                * The register address below maps to the MX8M
+                                * Fusemap Description Table entries this way.
+                                * Assuming
+                                *   reg = <ADDR SIZE>;
+                                * then
+                                *   Fuse Address = (ADDR * 4) + 0x400
+                                * Note that if SIZE is greater than 4, then
+                                * each subsequent fuse is located at offset
+                                * +0x10 in Fusemap Description Table (e.g.
+                                * reg = <0x4 0x8> describes fuses 0x410 and
+                                * 0x420).
+                                */
+                               imx8mn_uid: unique-id@4 { /* 0x410-0x420 */
                                        reg = <0x4 0x8>;
                                };
 
-                               cpu_speed_grade: speed-grade@10 {
+                               cpu_speed_grade: speed-grade@10 { /* 0x440 */
                                        reg = <0x10 4>;
                                };
 
-                               fec_mac_address: mac-address@90 {
+                               fec_mac_address: mac-address@90 { /* 0x640 */
                                        reg = <0x90 6>;
                                };
                        };

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 7cddfa7a0d56d2a88f3d5602a196e6379e3bf6c0..58b466633f22dcd49685d39526daac390c77791c 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -425,19 +425,32 @@
                                #address-cells = <1>;
                                #size-cells = <1>;
 
-                               imx8mp_uid: unique-id@8 {
+                               /*
+                                * The register address below maps to the MX8M
+                                * Fusemap Description Table entries this way.
+                                * Assuming
+                                *   reg = <ADDR SIZE>;
+                                * then
+                                *   Fuse Address = (ADDR * 4) + 0x400
+                                * Note that if SIZE is greater than 4, then
+                                * each subsequent fuse is located at offset
+                                * +0x10 in Fusemap Description Table (e.g.
+                                * reg = <0x8 0x8> describes fuses 0x420 and
+                                * 0x430).
+                                */
+                               imx8mp_uid: unique-id@8 { /* 0x420-0x430 */
                                        reg = <0x8 0x8>;
                                };
 
-                               cpu_speed_grade: speed-grade@10 {
+                               cpu_speed_grade: speed-grade@10 { /* 0x440 */
                                        reg = <0x10 4>;
                                };
 
-                               eth_mac1: mac-address@90 {
+                               eth_mac1: mac-address@90 { /* 0x640 */
                                        reg = <0x90 6>;
                                };
 
-                               eth_mac2: mac-address@96 {
+                               eth_mac2: mac-address@96 { /* 0x658 */
                                        reg = <0x96 6>;
                                };
                        };

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 6eb5a98bb1bd490722fb8b6d117d1bcb5a2c251f..d59156fdee0bab8801a845248c65f2ee7c7a9774 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -593,15 +593,28 @@
                                #address-cells = <1>;
                                #size-cells = <1>;
 
-                               imx8mq_uid: soc-uid@4 {
+                               /*
+                                * The register address below maps to the MX8M
+                                * Fusemap Description Table entries this way.
+                                * Assuming
+                                *   reg = <ADDR SIZE>;
+                                * then
+                                *   Fuse Address = (ADDR * 4) + 0x400
+                                * Note that if SIZE is greater than 4, then
+                                * each subsequent fuse is located at offset
+                                * +0x10 in Fusemap Description Table (e.g.
+                                * reg = <0x4 0x8> describes fuses 0x410 and
+                                * 0x420).
+                                */
+                               imx8mq_uid: soc-uid@4 { /* 0x410-0x420 */
                                        reg = <0x4 0x8>;
                                };
 
-                               cpu_speed_grade: speed-grade@10 {
+                               cpu_speed_grade: speed-grade@10 { /* 0x440 */
                                        reg = <0x10 4>;
                                };
 
-                               fec_mac_address: mac-address@90 {
+                               fec_mac_address: mac-address@90 { /* 0x640 */
                                        reg = <0x90 6>;
                                };
                        };