riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes
authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>
Wed, 20 Dec 2023 21:17:39 +0000 (23:17 +0200)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 31 Jan 2024 12:23:26 +0000 (12:23 +0000)
Provide the sysmain and gmac DT nodes supporting the DWMAC found on the
StarFive JH7100 SoC.

Co-developed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/starfive/jh7100.dtsi

index 164b62787af4fb0d459e406afa23b780beda3c22..14d553047e8453d5110deb20f580cfda306a5365 100644 (file)
                        status = "disabled";
                };
 
+               gmac: ethernet@10020000 {
+                       compatible = "starfive,jh7100-dwmac", "snps,dwmac";
+                       reg = <0x0 0x10020000 0x0 0x10000>;
+                       clocks = <&clkgen JH7100_CLK_GMAC_ROOT_DIV>,
+                                <&clkgen JH7100_CLK_GMAC_AHB>,
+                                <&clkgen JH7100_CLK_GMAC_PTP_REF>,
+                                <&clkgen JH7100_CLK_GMAC_TX_INV>,
+                                <&clkgen JH7100_CLK_GMAC_GTX>;
+                       clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "gtx";
+                       resets = <&rstgen JH7100_RSTN_GMAC_AHB>;
+                       reset-names = "ahb";
+                       interrupts = <6>, <7>;
+                       interrupt-names = "macirq", "eth_wake_irq";
+                       max-frame-size = <9000>;
+                       snps,multicast-filter-bins = <32>;
+                       snps,perfect-filter-entries = <128>;
+                       starfive,syscon = <&sysmain 0x70 0>;
+                       rx-fifo-depth = <32768>;
+                       tx-fifo-depth = <16384>;
+                       snps,axi-config = <&stmmac_axi_setup>;
+                       snps,fixed-burst;
+                       snps,force_thresh_dma_mode;
+                       status = "disabled";
+
+                       stmmac_axi_setup: stmmac-axi-config {
+                               snps,wr_osr_lmt = <16>;
+                               snps,rd_osr_lmt = <16>;
+                               snps,blen = <256 128 64 32 0 0 0>;
+                       };
+               };
+
                clkgen: clock-controller@11800000 {
                        compatible = "starfive,jh7100-clkgen";
                        reg = <0x0 0x11800000 0x0 0x10000>;
                        #reset-cells = <1>;
                };
 
+               sysmain: syscon@11850000 {
+                       compatible = "starfive,jh7100-sysmain", "syscon";
+                       reg = <0x0 0x11850000 0x0 0x10000>;
+               };
+
                i2c0: i2c@118b0000 {
                        compatible = "snps,designware-i2c";
                        reg = <0x0 0x118b0000 0x0 0x10000>;