ARM: dts: rockchip: Move gpio aliases to SoC dtsi for RK3128

SoC TRM, SoC datasheet and board schematics always refer to the
same gpio numbers - even if not all are used for a specific board.
In order to not have to re-define them for every board move the
aliases to SoC dtsi for RK3128 like it's being done for most other
Rockchip ARM SoCs.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20231202130506.66738-3-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rockchip/rk3128-evb.dts b/arch/arm/boot/dts/rockchip/rk3128-evb.dts
index c38f42497cbd9eb8432dbcf7736fae37b273d7aa..776a483cc26b1f3ab29117d61ae1e980d34e59b8 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk3128-evb.dts
+++ b/arch/arm/boot/dts/rockchip/rk3128-evb.dts
@@ -12,10 +12,6 @@
        compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
 
        aliases {
-               gpio0 = &gpio0;
-               gpio1 = &gpio1;
-               gpio2 = &gpio2;
-               gpio3 = &gpio3;
                i2c1 = &i2c1;
                mmc0 = &emmc;
        };

diff --git a/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts b/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts
index de497f6e94565a928594964d9e324197bc8f6cdb..931c03f1410c863726fb1fcdfe9634aec9fe1acd 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts
+++ b/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts
@@ -12,10 +12,6 @@
 
        aliases {
                ethernet0 = &gmac;
-               gpio0 = &gpio0;
-               gpio1 = &gpio1;
-               gpio2 = &gpio2;
-               gpio3 = &gpio3;
                mmc0 = &emmc;
                mmc1 = &sdmmc;
                serial0 = &uart1;

diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index 414b690f96e445a611bb584b726884a4f5962906..8e5a13eb4effd93e66da54d0e7b334f9f47004ce 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -16,6 +16,13 @@
        #address-cells = <1>;
        #size-cells = <1>;
 
+       aliases {
+               gpio0 = &gpio0;
+               gpio1 = &gpio1;
+               gpio2 = &gpio2;
+               gpio3 = &gpio3;
+       };
+
        arm-pmu {
                compatible = "arm,cortex-a7-pmu";
                interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,