drm/amdgpu: Correct and simplify sdma 4.x irq.num_types
authorFeifei Xu <Feifei.Xu@amd.com>
Sun, 25 Apr 2021 07:49:23 +0000 (15:49 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 29 Apr 2021 03:36:04 +0000 (23:36 -0400)
Correct and init the sdma4.x irq.num_types.

v2: squash in fix (Alex)

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

index 85ab9bbcd5518a79e3db3e80c830f39dc2a9b21d..d197185f778903182c2ec8c0750cb271ab8a92a1 100644 (file)
@@ -2599,27 +2599,18 @@ static const struct amdgpu_irq_src_funcs sdma_v4_0_srbm_write_irq_funcs = {
 
 static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev)
 {
+       adev->sdma.trap_irq.num_types = adev->sdma.num_instances;
+       adev->sdma.ecc_irq.num_types = adev->sdma.num_instances;
+       /*For Arcturus and Aldebaran, add another 4 irq handler*/
        switch (adev->sdma.num_instances) {
-       case 1:
-               adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
-               adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
-               break;
        case 5:
-               adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE5;
-               adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE5;
-               break;
        case 8:
-               adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
-               adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
-               adev->sdma.vm_hole_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE5;
-               adev->sdma.doorbell_invalid_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
-               adev->sdma.pool_timeout_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
-               adev->sdma.srbm_write_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
+               adev->sdma.vm_hole_irq.num_types = adev->sdma.num_instances;
+               adev->sdma.doorbell_invalid_irq.num_types = adev->sdma.num_instances;
+               adev->sdma.pool_timeout_irq.num_types = adev->sdma.num_instances;
+               adev->sdma.srbm_write_irq.num_types = adev->sdma.num_instances;
                break;
-       case 2:
        default:
-               adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2;
-               adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2;
                break;
        }
        adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs;