wifi: ath11k: add support for QCA2066
authorBaochen Qiang <quic_bqiang@quicinc.com>
Tue, 9 Jan 2024 02:13:36 +0000 (10:13 +0800)
committerKalle Valo <quic_kvalo@quicinc.com>
Thu, 15 Feb 2024 11:23:50 +0000 (13:23 +0200)
QCA2066 is a PCI based DBS device. It is very similar to WCN6855
overall: they share the same PCI device ID, the same major and
minor version numbers, the same register address, and same HAL
descriptors etc. The most significant difference is that QCA2066
supports 3-antenna configuration while WCN6855 does not. To differentiate
them, subversion numbers are used. Currently four numbers are used
by QCA2066: 0x1019A0E1, 0x1019B0E1, 0x1019C0E1 and 0x1019D0E1.

Tested-on: QCA2066 hw2.1 PCI WLAN.HSP.1.1-03737-QCAHSPSWPL_V2_SILICONZ_CE-1
Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3

Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://msgid.link/20240109021336.4143-3-quic_bqiang@quicinc.com
drivers/net/wireless/ath/ath11k/core.c
drivers/net/wireless/ath/ath11k/core.h
drivers/net/wireless/ath/ath11k/mhi.c
drivers/net/wireless/ath/ath11k/pci.c
drivers/net/wireless/ath/ath11k/pcic.c

index 3c1ba8fd28f47c2aecd25526aef6305a1ebcbc52..922e67f8e04ff67efedee4704518f5cb682c95f2 100644 (file)
@@ -711,6 +711,92 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
                .support_fw_mac_sequence = false,
                .support_dual_stations = false,
        },
+       {
+               .name = "qca2066 hw2.1",
+               .hw_rev = ATH11K_HW_QCA2066_HW21,
+               .fw = {
+                       .dir = "QCA2066/hw2.1",
+                       .board_size = 256 * 1024,
+                       .cal_offset = 128 * 1024,
+               },
+               .max_radios = 3,
+               .bdf_addr = 0x4B0C0000,
+               .hw_ops = &wcn6855_ops,
+               .ring_mask = &ath11k_hw_ring_mask_qca6390,
+               .internal_sleep_clock = true,
+               .regs = &wcn6855_regs,
+               .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,
+               .host_ce_config = ath11k_host_ce_config_qca6390,
+               .ce_count = 9,
+               .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
+               .target_ce_count = 9,
+               .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
+               .svc_to_ce_map_len = 14,
+               .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
+               .single_pdev_only = true,
+               .rxdma1_enable = false,
+               .num_rxmda_per_pdev = 2,
+               .rx_mac_buf_ring = true,
+               .vdev_start_delay = true,
+               .htt_peer_map_v2 = false,
+
+               .spectral = {
+                       .fft_sz = 0,
+                       .fft_pad_sz = 0,
+                       .summary_pad_sz = 0,
+                       .fft_hdr_len = 0,
+                       .max_fft_bins = 0,
+                       .fragment_160mhz = false,
+               },
+
+               .interface_modes = BIT(NL80211_IFTYPE_STATION) |
+                                       BIT(NL80211_IFTYPE_AP),
+               .supports_monitor = false,
+               .full_monitor_mode = false,
+               .supports_shadow_regs = true,
+               .idle_ps = true,
+               .supports_sta_ps = true,
+               .coldboot_cal_mm = false,
+               .coldboot_cal_ftm = false,
+               .cbcal_restart_fw = false,
+               .fw_mem_mode = 0,
+               .num_vdevs = 2 + 1,
+               .num_peers = 512,
+               .supports_suspend = true,
+               .hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
+               .supports_regdb = true,
+               .fix_l1ss = false,
+               .credit_flow = true,
+               .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
+               .hal_params = &ath11k_hw_hal_params_qca6390,
+               .supports_dynamic_smps_6ghz = false,
+               .alloc_cacheable_memory = false,
+               .supports_rssi_stats = true,
+               .fw_wmi_diag_event = true,
+               .current_cc_support = true,
+               .dbr_debug_support = false,
+               .global_reset = true,
+               .bios_sar_capa = &ath11k_hw_sar_capa_wcn6855,
+               .m3_fw_support = true,
+               .fixed_bdf_addr = false,
+               .fixed_mem_region = false,
+               .static_window_map = false,
+               .hybrid_bus_type = false,
+               .fixed_fw_mem = false,
+               .support_off_channel_tx = true,
+               .supports_multi_bssid = true,
+
+               .sram_dump = {
+                       .start = 0x01400000,
+                       .end = 0x0177ffff,
+               },
+
+               .tcl_ring_retry = true,
+               .tx_ring_size = DP_TCL_DATA_RING_SIZE,
+               .smp2p_wow_exit = false,
+               .support_fw_mac_sequence = true,
+               .support_dual_stations = true,
+       },
 };
 
 static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)
index 0b2d4a93d706e129f8eae67168a665daf63880eb..b3fb74a226fb9878730e4ffddbda6f267d91fe66 100644 (file)
@@ -147,6 +147,7 @@ enum ath11k_hw_rev {
        ATH11K_HW_WCN6855_HW21,
        ATH11K_HW_WCN6750_HW10,
        ATH11K_HW_IPQ5018_HW10,
+       ATH11K_HW_QCA2066_HW21,
 };
 
 enum ath11k_firmware_mode {
index e6e69bb911036ee8b8f8e6fa6e4a91ea7959b8a8..b53659145fcfa132a224d4709ae6fbbee841ebcd 100644 (file)
@@ -443,6 +443,7 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci)
        case ATH11K_HW_QCA6390_HW20:
        case ATH11K_HW_WCN6855_HW20:
        case ATH11K_HW_WCN6855_HW21:
+       case ATH11K_HW_QCA2066_HW21:
                ath11k_mhi_config = &ath11k_mhi_config_qca6390;
                break;
        default:
index 022d695be00f1daeb207c2bead872b9d2aae16bd..be9d2c69cc4137c519244ce02e4eaa3bdf2ec546 100644 (file)
@@ -29,6 +29,8 @@
 #define QCN9074_DEVICE_ID              0x1104
 #define WCN6855_DEVICE_ID              0x1103
 
+#define TCSR_SOC_HW_SUB_VER    0x1910010
+
 static const struct pci_device_id ath11k_pci_id_table[] = {
        { PCI_VDEVICE(QCOM, QCA6390_DEVICE_ID) },
        { PCI_VDEVICE(QCOM, WCN6855_DEVICE_ID) },
@@ -743,6 +745,7 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
        struct ath11k_pci *ab_pci;
        u32 soc_hw_version_major, soc_hw_version_minor, addr;
        int ret;
+       u32 sub_version;
 
        ab = ath11k_core_alloc(&pdev->dev, sizeof(*ab_pci), ATH11K_BUS_PCI);
 
@@ -833,7 +836,19 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
                                break;
                        case 0x10:
                        case 0x11:
-                               ab->hw_rev = ATH11K_HW_WCN6855_HW21;
+                               sub_version = ath11k_pcic_read32(ab, TCSR_SOC_HW_SUB_VER);
+                               ath11k_dbg(ab, ATH11K_DBG_PCI, "sub_version 0x%x\n",
+                                          sub_version);
+                               switch (sub_version) {
+                               case 0x1019A0E1:
+                               case 0x1019B0E1:
+                               case 0x1019C0E1:
+                               case 0x1019D0E1:
+                                       ab->hw_rev = ATH11K_HW_QCA2066_HW21;
+                                       break;
+                               default:
+                                       ab->hw_rev = ATH11K_HW_WCN6855_HW21;
+                               }
                                break;
                        default:
                                goto unsupported_wcn6855_soc;
index 15e2ceb22a44d752145f824952b8855d293caa21..add4db4c50bcc3ebdc3bac75b90e7545b8e480c8 100644 (file)
@@ -115,6 +115,17 @@ static const struct ath11k_msi_config ath11k_msi_config[] = {
                },
                .hw_rev = ATH11K_HW_WCN6750_HW10,
        },
+       {
+               .total_vectors = 32,
+               .total_users = 4,
+               .users = (struct ath11k_msi_user[]) {
+                       { .name = "MHI", .num_vectors = 3, .base_vector = 0 },
+                       { .name = "CE", .num_vectors = 10, .base_vector = 3 },
+                       { .name = "WAKE", .num_vectors = 1, .base_vector = 13 },
+                       { .name = "DP", .num_vectors = 18, .base_vector = 14 },
+               },
+               .hw_rev = ATH11K_HW_QCA2066_HW21,
+       },
 };
 
 int ath11k_pcic_init_msi_config(struct ath11k_base *ab)